Analysis
Forum
Verilog-AMS
Analysis
Modeling
Design
Theory
Phase Noise and Jitter
Verification of bit-error rate in bang-bang clock and data recovery circuits
Predicting the phase noise and jitter of PLL-based frequency synthesizers
Predicting the phase noise of PLL-based frequency synthesizers
Modeling jitter in PLL-based frequency synthesizers
Simulating the phase noise contribution of the divider in a phase lock loop
Also see the cyclostationary noise papers in the
Theory
section.
RF Simulation
Introduction to RF simulation and its application
Accurate and rapid measurement of IP2 and IP3
Hidden state in SpectreRF
and corresponding
Verilog-A models
.
Analog Simulation
Comparator metastability analysis
A methodology for the offset-simulation of comparators
Device noise simulation of delta-sigma modulators
and associated Matlab scripts:
scripts.tar.gz
,
scripts.zip
.
Simulating switched-capacitor filters with SpectreRF
and associated netlists:
sc-netlists.zip
.
The Designer's Guide to SPICE and Spectre
Test Benches
A test bench for differential circuits
Measuring S-parameters of a differential mixer
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