bernd
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In most of the chip design cases you have more than one ground net connected to substrate e.g. you have a digital and an analog ground on your chip. In reality these net might be connect over substrate, but for Assura LVS these nets have different net names, so it's a kind of a short over the substrate for the LVS.
Therefore most of the design kits come with a dummy layer to isolate one part or more parts of the substrate for the LVS, have a look for it.
Or otherwise all your nets connected to substrate should have the same name.
Bernd
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