// Generated for: spectre
// Generated on: Feb 21 18:09:47 2014
// Design library name: 20140215_IQmixer_1.4V
// Design cell name: Second_Cal_IRR
// Design view name: schematic
simulator lang=spectre
global 0
parameters offset_sw=4.04m offset_gm=3.5m floI=13G floQ=13G ploI=-1 \
    ploQ=-1 frf=12G prf=-20 Fgr_SW=18 Fgr_gm=8 VDD=1.4 V_SW=1 V_RF=700m \
    RD=300
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=probe
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_bip_npn
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfres_sa
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmvar
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_esd
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rtmom
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmvar_25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_disres
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_na
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_lowcpad
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_mim
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_bip_npn_s
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfrtmom
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_na25od33
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_hvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfres_rpo
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_na25od33
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmim
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_res
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_lvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_hvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_mlvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_bip
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_mos_cap
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_18
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_na
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_hvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfind
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_hia_rf
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_33
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_lvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_na25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_dnw
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_mlvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfjvar
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmvar_hvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_na25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_18
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_mos_cap_25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_33
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_mlvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfsbd
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_33
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_25
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_bip_s
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_hv25_snw_spw
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_rfmos_lvt
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=tt_dio_18
include "/disk4/pdks/tsmcN65LP/tsmcN65/../models/spectre/crn65lp_v1d5.scs" section=stat_noise

// Library name: 20140215_IQmixer_1.4V
// Cell name: Second_Cal_IRR
// View name: schematic
V28 (net012 V_LOI\-) vsource dc=offset_sw type=dc
V27 (net055 V_RF\-) vsource dc=offset_gm type=dc
V26 (V_RF\+ net060) vsource dc=offset_gm type=dc
V23 (net58 net59) vsource type=dc
V24 (net57 net60) vsource type=dc
V21 (net25 net53) vsource type=dc
V16 (net61 net25) vsource type=dc
V12 (net52 net23) vsource type=dc
V15 (net62 net50) vsource type=dc
V13 (net63 net25) vsource type=dc
V9 (net47 net18) vsource type=dc
V22 (net50 net46) vsource type=dc
V19 (net64 net50) vsource type=dc
V20 (net65 net15) vsource type=dc
V11 (net15 net42) vsource type=dc
V8 (net52 net13) vsource type=dc
V17 (net66 net40) vsource type=dc
V18 (net67 net15) vsource type=dc
V7 (net47 net8) vsource type=dc
V14 (net68 net40) vsource type=dc
V10 (net40 net35) vsource type=dc
V2 (net30 net70) vsource type=dc
V3 (net29 net69) vsource type=dc
V6 (net28 net72) vsource type=dc
V5 (net27 net71) vsource type=dc
V25 (net4 0) vsource dc=V_SW type=dc
V4 (net3 0) vsource dc=V_SW type=dc
V1 (net2 0) vsource dc=V_RF type=dc
V0 (VDD 0) vsource dc=VDD type=dc
R9 (net53 VDD) resistor r=RD
R6 (net46 VDD) resistor r=RD
R3 (net42 VDD) resistor r=RD
R0 (net35 VDD) resistor r=RD
R5 (V_LOQ\+ net4) resistor r=5K
R4 (V_LOQ\- net4) resistor r=5K
R12 (V_LOI\+ net3) resistor r=5K
R13 (V_LOI\- net3) resistor r=5K
R8 (net2 V_RF\-) resistor r=5K
R7 (V_RF\+ net2) resistor r=5K
PORT2 (net58 net57) port r=50 type=sine freq=floQ dbm=ploQ sinephase=90 \
        fundname="FLOQ"
PORT1 (net30 net29) port r=311 type=sine freq=frf dbm=prf fundname="FRF"
PORT0 (net28 net27) port r=50 type=sine freq=floI dbm=ploI fundname="FLOI"
C5 (V_LOQ\- net60) capacitor c=2p
C3 (V_LOQ\+ net59) capacitor c=2p
C0 (V_RF\+ net70) capacitor c=2p
C1 (V_RF\- net69) capacitor c=2p
C4 (V_LOI\+ net72) capacitor c=2p
C2 (V_LOI\- net71) capacitor c=2p
M10 (net61 V_LOQ\+ net23 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M0 (net52 net055 0 0) nmos_rf_lvt lr=90n wr=1u nr=Fgr_gm sca=0 scb=0 scc=0 \
        sigma=1 m=2 mismatchflag=0 sa=450.0n sd=240.0n
M9 (net62 V_LOQ\- net23 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M8 (net63 V_LOQ\- net18 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M11 (net64 V_LOQ\+ net18 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M4 (net65 V_LOI\+ net13 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M5 (net66 net012 net13 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M3 (net67 net012 net8 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
M1 (net47 net060 0 0) nmos_rf_lvt lr=90n wr=1u nr=Fgr_gm sca=0 scb=0 scc=0 \
        sigma=1 m=2 mismatchflag=0 sa=450.0n sd=240.0n
M2 (net68 V_LOI\+ net8 0) nmos_rf_lvt lr=60n wr=1u nr=Fgr_SW sca=0 scb=0 \
        scc=0 sigma=1 m=1 mismatchflag=0 sa=450.0n sd=240.0n
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf 
pss  pss  flexbalance=yes  oversamplefactor=8  fund=100M  harms=300
+    errpreset=moderate  tstab=800n  annotate=status
dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
dcOpInfo info what=oppoint where=rawfile
tran tran stop=1u errpreset=moderate write="spectre.ic" \
    writefinal="spectre.fc" annotate=status maxiters=5 
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts  where=rawfile
saveOptions options save=allpub
