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Design >> RF Design >> Why is the drain current bidirectional??
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Message started by zhangjerome on Apr 9th, 2007, 6:46am

Title: Why is the drain current bidirectional??
Post by zhangjerome on Apr 9th, 2007, 6:46am

I am now designing a VCO with cross-coupled PMOS. After tran simulation, I found out that the drain current is
bidrectional with positive maximum about 2mA and negative maximum about -4mA. I think the drain current of
PMOS should always be nagative since drain voltage is always lower than  source voltage.  And in a VCO the drain current of a PMOS should be switched on and off with a value between 0 and some nagative value.

So why does this happen??  Does anybody encounter this problem before??

  Best regrads.

  Thank you.

                            Jerome




Title: Re: Why is the drain current bidirectional??
Post by vivkr on Apr 10th, 2007, 2:40am

Hi Jerome,

Is your drain voltage by any chance exceeding the source or bulk voltages?

Regards
Vivek

Title: Re: Why is the drain current bidirectional??
Post by zhangjerome on Apr 10th, 2007, 4:27am

Vivkr:

The bulk and the sourcr are both conneted to Vdd and theie voltage are always higher than drain voltage.

Title: Re: Why is the drain current bidirectional??
Post by vivkr on Apr 10th, 2007, 7:17am

Hi Jerome,

THat is really strange. Would you mind posting your VCO schematic?


Regards
Vivek

Title: Re: Why is the drain current bidirectional??
Post by zhangjerome on Apr 11th, 2007, 1:17am

The attatched file is the current waveform of each PMOS node and the drain voltage waveform. The gate voltage has  similar waveform as the drain voltage except 180 degree phase difference since this PMOS is cross-coupled with another PMOS.

Title: Re: Why is the drain current bidirectional??
Post by zhangjerome on Apr 11th, 2007, 1:23am

And the schematic of the VCO. The ideal current source is just used for simplity and in the real circuit it is in fact a current mirror.

Title: Re: Why is the drain current bidirectional??
Post by vivkr on Apr 11th, 2007, 1:45am

Dear Jerome,

I see that the cross-couple PMOS have source-bulk shorted and this goes to the current mirror. So the
bulk of these devices is not really hard tied to VDD, neither is the source. Forgive me for harping on the same
theme but have you checked the transient voltages at the drain, soruce and bulk.

One way to get rid of the issue would be to tie the bulk of the cross-coupled PMOS to vdd directly.

However, the ultimate question is - What is the impact of the bidirectional drain current on your circuit?

Regards
Vivek

Title: Re: Why is the drain current bidirectional??
Post by zhangjerome on Apr 13th, 2007, 11:54pm

On the top it is not a current source but in fact a Vsource. The current source is at the bottom.

I just think this phenominon is unusual so maybe there are some mistakes with my circuit or the model files.

Thank you.


Title: Re: Why is the drain current bidirectional??
Post by yang on May 7th, 2007, 2:46pm

In my opinion, it is due to the parasitic components, specifically parasitic capacitors inside PMOS. If the frequency is high enough, the source current is not the inner source current of a transistor that you want. You can check it by reduce the oscillation frequency.

I suggest you investigate the model firstly.

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