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Design >> Mixed-Signal Design >> Sigma Delta DAC Model
https://designers-guide.org/forum/YaBB.pl?num=1181029113

Message started by Nibblo on Jun 5^th, 2007, 12:38am

Title: Sigma Delta DAC Model
Post by Nibblo on Jun 5^th, 2007, 12:38am

Hi there, I am looking to model a 1bit Sigma Delta DAC
using Verilog AMS or similar. Can anyone tell me if
there is a model already available for use with Cadence?

-Nibblo-

Title: Re: Sigma Delta DAC Model
Post by adesign on Jun 5^th, 2007, 1:33am

This is a good start. I'm not sure if it can be used with Cadence.

http://www-mtl.mit.edu/researchgroups/perrottgroup/tools.html

Title: Re: Sigma Delta DAC Model
Post by NitinAtCadence on Jun 27^th, 2007, 9:56am

Hi Nibblo,
A DAC model in Vams should not be too difficult, however there is nothing directly available from Cadence. However, the 'bmslib' from Cadence has a model for a behavioral 8-bit DAC, and also a current-steering DAC. These may not directly apply to the Sig-Delta, but it will give you a good idea of where to start.

Title: Re: Sigma Delta DAC Model
Post by ywguo on Jul 13^th, 2007, 6:53am

Hi,

In 'ahdlLib' from Cadence, there are a first order sigma delta ADC, named sigmadelta_1storder. There are DAC model in 'ahdlLib', too. Please take a look.

Yawei