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Design >> Mixed-Signal Design >> referenceless CDR paper/reference?
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Message started by Visjnoe on Jul 2nd, 2007, 5:02am

Title: referenceless CDR paper/reference?
Post by Visjnoe on Jul 2nd, 2007, 5:02am

Dear all,

does anyone have a good reference to a referenceless clock and data recovery (CDR) implementation,
meaning a CDR with a PD which allows phase and frequency tracking?

I've seen a paper by DeVito but it requires modifications to a standard (2-input) CP...it might be an option, but it would be nice to have a less 'disrupting' PD architecture (thus having a single UP/DOWN output port).

Regards

Peter

Title: Re: referenceless CDR paper/reference?
Post by Visjnoe on Jul 2nd, 2007, 8:12am

Dear all,

in the meantime, I found this paper already:

Dong-Hee Kim and Jin-Ku Kang, "A 1.0Gbps Clock and Data Recovery Circuit with Two-XOR Phase-Frequency Detector",AP-ASIC 2000.

It looks promising, but I don't think their approach guarantees frequency lock with a random (NRZ) data input...
it's just a feeling (has to be verified). There are also no measurement results in there.

Regards

Peter

Title: Re: referenceless CDR paper/reference?
Post by iccc on Jul 10th, 2007, 1:07am

You can refer to Razavi's book-Design of Intergrated circuits for optical communication.Maybe this paper is helpful.

Title: Re: referenceless CDR paper/reference?
Post by Paul on Jul 12th, 2007, 3:02pm

Hi Peter,

Due to the non-periodic input data, clock recovery cannot use combined phase-frequency detectors. This means that in any case, you need to rely on a frequency acquisition loop operating side-by-side with the phase-locked loop. I don't know the last reference you mention, but some publications focus on the phase loop and omit to talk about the frequency loop.

If you plan to design a reference-less CDR, you may want to have a look at the quadricorrelator topology as a starting point:
http://www.ee.ucla.edu/~brweb/papers/Journals/BRApr96.pdf

Regards
Paul

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