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Design >> Mixed-Signal Design >> two phase non-overlapping clock
https://designers-guide.org/forum/YaBB.pl?num=1184465084

Message started by dai_hisense on Jul 14^th, 2007, 7:04pm

Title: two phase non-overlapping clock
Post by dai_hisense on Jul 14^th, 2007, 7:04pm

hi,all
Can anybody here tell me when design two phase non-overlapping clock, how much non-overlapping time and delay time is suitble for sigma delta ADC respectively?
Thanks in advance!
jun

Title: Re: two phase non-overlapping clock
Post by Berti on Jul 15^th, 2007, 10:34pm

Because the non-overlapping time reduces the settling time I would
recommend to design for a short non-overlap time. However, you
need to make sure that the phases never overlap to avoid charge-sharing
(also in presence of process/temperature variations, jitter etc.)
However, if you clock frequency is low the non-overlap time is not that critical since
it has only a small contribution to the overall settling time (and I would add more
margin).

Regards

Title: Re: two phase non-overlapping clock
Post by Visjnoe on Jul 15^th, 2007, 11:40pm

Hello,

10% of the clock period is a common value.

Regards

Peter

Title: Re: two phase non-overlapping clock
Post by dai_hisense on Jul 18^th, 2007, 4:14am

A lot of thanks to Berti.