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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> phase domain or voltage domain of PLL ? https://designers-guide.org/forum/YaBB.pl?num=1186411495 Message started by sunrise on Aug 6th, 2007, 7:44am |
Title: phase domain or voltage domain of PLL ? Post by sunrise on Aug 6th, 2007, 7:44am hi ,all I am a beginner to the design of pll system . I find that the model of pll is made in phase domain and voltage domain . Actually ,I am pluzzed ,what is the difference of the voltage domain and phase domain Thanks for your advice! |
Title: Re: phase domain or voltage domain of PLL ? Post by Jess Chen on Aug 6th, 2007, 8:21am The VCO reveals the main difference between voltage and phase domain models. In a voltage domain model, the VCO model in steady state outputs an oscillatory voltage. In a phase domain model, the VCO model in steady state outputs a ramp representing the phase of the VCO. In some phase domain models, the VCO model in steady state outputs a constant representing VCO frequency. In a voltage domain model, the dividers are counters. In a phase domain model, they are gain blocks. In a voltage domain model, the PFD operates on the edges of the reference and divider waveforms. In phase domain model, the PFD is an error amplifier and sometimes includes an integrator. |
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