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Design >> Analog Design >> differential pair offset
https://designers-guide.org/forum/YaBB.pl?num=1223974471

Message started by PalmRunner on Oct 14^th, 2008, 1:54am

Title: differential pair offset
Post by PalmRunner on Oct 14^th, 2008, 1:54am

Hello all,
I am writing my first post in this useful forum starting with a question. Here is the background:

I need to design a simple continuous time comparator, so I started with the basic two stage comparator described in the Allen/Holberg book. I use Spectre Monte Carlo analysis to simulate the offset. Here are the 1 sigma results with different aspect ratio of the input pair, but same area:

W/L 1 sigma
-----------------------
4/5 -> 1.59mV
10/2 -> 1.39mV
20/1 -> 1.35mV
40/0.5 -> 1.34mV

My intuition tells me that longer transistors or those biased in a strong inversion should exhibit less random / delta Vt mismatch, as it is in a current mirror for example. The question is why I get just the opposite effect here?
Any input is greatly appreciated.

Thanks!

Title: Re: differential pair offset
Post by raja.cedt on Oct 14^th, 2008, 3:23am

I don't know the answer for your question but one conceptual correction to your discussion is variations is ∝1/√(w*L). so according to this pilgrims model offset for your all samples should same.but i don't know how they came like that
Thanks

Title: Re: differential pair offset
Post by PalmRunner on Oct 14^th, 2008, 4:44am

In my understanding, the operating point should also influence the spread, not only the transistor area. For example, larger Vgs overdrive basically has a positive effect on the Ids spread, while it seems to be the opposite for a differential pair.

Title: Re: differential pair offset
Post by aaron_do on Oct 14^th, 2008, 5:47am

Hi,

If i remember correctly, there is nothing wrong with your simulation. According to the analysis in Razavi's analog IC design book, offset actually increases with overdrive for a differential pair.

cheers,
Aaron

Title: Re: differential pair offset
Post by PalmRunner on Oct 14^th, 2008, 10:13am

Thanks Aaron, I found the chapter in Razavi’s book. I follow the equations, but honestly I am still having hard times to grasp what is behind. Why lowering the Vgs-Vt would help us to reduce the offset. In my understanding low overdrive voltage would make the input pair more sensitive to Vt variations, which in turn would reflect in larger current variations. Obviously I am missing something very basic. Can someone help me with somewhat more intuitive explanation?

Title: Re: differential pair offset
Post by thechopper on Oct 14^th, 2008, 11:28am

Hi

One possible explanantion could be related to the offset contribution from your active load. The larger the input pair gm, the less contribution from the load to the total input diff pair. This is what you are getting out of your simulation.

Hope this helps
Tosei