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https://designers-guide.org/forum/YaBB.pl Design >> RF Design >> Jitter and Phase Noise https://designers-guide.org/forum/YaBB.pl?num=1072257563 Message started by RoiFaust on Dec 24th, 2003, 1:19am |
Title: Jitter and Phase Noise Post by RoiFaust on Dec 24th, 2003, 1:19am Does anyone knows how to get jitter (the RMS will do) of a clock from its phase noise and vice-versa. Or maybe you are familiar with a good article on the subject. Thx Roi ;D |
Title: Re: Jitter and Phase Noise Post by Jitter Man on Dec 24th, 2003, 9:29am You can find some of that information in the documents on this website (try Predicting the phase noise and jitter of PLL-based frequency synthesizers in www.designers-guide.com/Analysis. You might also try David C Lee, Analysis of jitter in phase-locked loops. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, no. 11, pp. 704-711, November 2002. [glb]Jitter Man[/glb] |
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