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Analog Verification >> Analog Functional Verification >> measurement and testbench elements
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Message started by sunworld on Oct 27th, 2004, 9:09pm

Title: measurement and testbench elements
Post by sunworld on Oct 27th, 2004, 9:09pm

Hi all,

Let's talk about elements to facilitate measurements and
diagnostics for system design.

Does anyone have anything to say?

Regards


Title: Re: measurement and testbench elements
Post by Eugene on Jan 2nd, 2005, 10:11pm

I think measurement and diagnostics are important applications of behavioral modeling, especially in the communications arena. For example, to compute the error vector magnitude at the output of an RF transmitter, the RF signal must pass through an ideal RF receiver and a digital equalizer. Both are non-trivial. Some RF simulators can extract the desired baseband equivalent signal without an RF receiver but the equalizer is still a challenge. The problem is that the EVM that matters is the one you measure in the lab and not all lab equipments use the same equalizer software. I've seen EVM measurements from different equipment manufacturers differ by 3dB when measuring the same transmitter. To make matters worse, it is hard to get the equipment vendors to give you their equalizer source code so you can code up your own VerilogA EVM meter. Therefore, I think the answer is to find a seamless way to link the simulators with the lab software.

For now, I use VerilogA to strobe and record the output nodes of interest using a format that fools the lab software into thinking it's analyzing lab data. The only problem is that I have to create a new model for every circuit because VerilogA does not let me pass a file name to the strobe-and-record module.

Measurement is definitely an important VerilogA application. Typically, my VerilogA measurement models are the largest models in the simulation by a factor of 10 or so. They also often determine the run time.

Title: Re: measurement and testbench elements
Post by sheldon on Jan 23rd, 2005, 5:07pm

Eugene,

  Have you ever tried SpectreMDL. Since it was developed to
address the measurement issue, it may be more efficient.
Unfortunately, it is not portable! BTW, I have not tried it,
other than looking at demo material.

                                                                   Sheldon

Title: Re: measurement and testbench elements
Post by Eugene on Jan 23rd, 2005, 8:45pm

I have heard of MDL but also never tried it. We just updated our Cadence code so perhaps I'll look for it. From what I understand of it, I might indeed be able to shift some of the instrumentation I've done in VerilogA into MDL. Thanks for the tip.

Title: Re: measurement and testbench elements
Post by jbdavid on Oct 2nd, 2005, 5:26pm

Thats a really broad subject..
and an area where I am ALWAYS adding to my collection of Verilog-AMS models..
IE one to read and write data files to and from Matlab..
(nice thing about VERILOG (as opposed to Verilog-A) is that you can use a string variable to open a new file with.) - so with AMS you can pass analog data to the event driven side to write it to a file.

Another one, is testbench controlability.. I often now include tasks in my models to allow me to modify the source on the fly (dc - sine - new frequency - to pulse - back to the original dc value) - Mostly useful in the simvision simulation debugging environment.

jbd


sunworld wrote on Oct 27th, 2004, 9:09pm:
Hi all,

Let's talk about elements to facilitate measurements and
diagnostics for system design.

Does anyone have anything to say?

Regards


Title: Re: measurement and testbench elements
Post by Matt VD on Apr 26th, 2007, 6:06am

Just as an update.... in the newest version of VerilogA you CAN use string variables to open files.  I use VerilogA extensively as the way to store results and automate measurements over corners, different settings, etc.  To do this, I usually set my file variable string to something like the following:
file_results_%D_%T_%P.txt
Where %D = date, %T = time, %P = PID.
Then I will cat all the file_results*.txt into a csv file, and use Excel to look at the results.  (I write my VerilogA to output data in Excel PivotChart/Pivot Table readable format... if you've never used Pivot Chart in Excel, you should definitely take a look.  It's a big help for data-analysis over corners/settings and quick plots of exactly what you want.)

In the newest version of VerilogA, you can also read in from a text file and use this to control the simulations (for example, I use this feature to automate setting trim bits over corners).

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