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Measurements >> Other Measurements >> Dropout Voltage Simulation
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Message started by Raj on Sep 4^th, 2005, 10:35pm

Title: Dropout Voltage Simulation
Post by Raj on Sep 4^th, 2005, 10:35pm

Hello ,
Can anybody tell me How to do Dropout Voltage Simulation for a CMOS Voltage Regulator which converts 1.2V reference from BandGap to 1.8V output. Supply voltage is 3.3V. Any suggestion on test-setup for this simulation is greatly appreciated.

Thanks,
Packiaraj.V.

Title: Re: Dropout Voltage Simulation
Post by ywguo on Sep 28^th, 2005, 5:23am

Raj,

Would you please give the purpose of the simulation? Do you want to run transient simulation or AC simulation?

Yawei

Title: Re: Dropout Voltage Simulation
Post by sheldon on Sep 29^th, 2005, 5:40am

Raj,

Since you don't mention whether you are working on
a linear regulator or a switching regulator, let's assume
that you are interested in an LDO. In that case, just
use your standard testbench and do a dc sweep of
the input voltage and and look for the voltage when
the regulator goes out of regulation. At some point
the output voltage will change as the input voltage
changes, that is, voltage where the regulator goes
out of regulation. The difference between the input
voltage and the out voltage as the regulator goes
out of regulation is the Droput Voltage.

Best Regards,

Sheldon

Title: Re: Dropout Voltage Simulation
Post by Raj on Oct 5^th, 2005, 7:22am

Hi Sheldon,
It is LDO regulator that employs an OPAMP and PMOS pass device. The PMOS pass device is connected to the output of OPAMP. Its source is connected to VDD and to the drain there are two resistors in series. The -ve OPAMP input is from the bandgap i.e., 1.2 Volt. +ve input is drawn from the middle point of two resistors connected at the drain of PMOS pass device.

When I swept the supply voltage VDD , the output voltage whose nominal value should be 1.8 Volt varies drastically. The output voltage also ramps when it is supposed to stay at 1.8 Volt (Line Regulation).
Any problem in circuit or way i understand?

Thanks in advance,
Packiaraj.V.

Title: Re: Dropout Voltage Simulation
Post by ywguo on Oct 5^th, 2005, 6:51pm

Raj,

What is the voltage range did you swept? Have you checked the voltage at the gate of the transistor gate?

Yawei