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Other CAD Tools >> Unmet Needs in Analog CAD >> EE Times commentary: analog layout automation
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Message started by mg777 on May 20^th, 2007, 7:28pm

Title: EE Times commentary: analog layout automation
Post by mg777 on May 20^th, 2007, 7:28pm

EDA veteran Jim Solomon on analog layout automation:

http://www.eetimes.com/news/design/showArticle.jhtml?articleID=199601718

Title: Re: EE Times commentary: analog layout automation
Post by didac on May 20^th, 2007, 11:54pm

Good article, it explains very clear which are the main problems of analog layout and how must be the solution. The only sad thing for me is that I must hurry to get the Phd or at the lab I will be obsolete as "layout man"...

Title: Re: EE Times commentary: analog layout automation
Post by krishnap on May 23^rd, 2007, 7:25am

Articel gives good insight on the needs for analog layout automation.
Currently few options like autorouter , where precesion is not important
and pcells for bigger modules etc are giving some speed.

Title: Re: EE Times commentary: analog layout automation
Post by weber8722 on Oct 29^th, 2012, 7:16am

Hi, reading this article from 5/17/2007 now - 2012 - I think not much has changed at all!!! :(
For most non-trivial circuits, like having 40 transistors most autoplacer fail, although a good designer can find a solution quickly. The constraint concept ends up with adding more and more constraints, till you have no overview anymore or run into over-constraintment or tool problems!
Take a look at "Deterministic Analog Circuit Placement using Hierarchically Bounded Enumeration and Enhanced Shape Functions", 2010. This paper describes an advanced placer, but the created layout would NEVER survice a real-world design review :'(.
It seems that our PhD workers like to create new and more algorithms, but not even have criteria or benchmark to decide what a good layout is!

Bye Stephan

Title: Re: EE Times commentary: analog layout automation
Post by Dan Clement on Oct 31^st, 2012, 8:09pm

Check with the analog rails guys...