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Modeling >> Passive Devices >> Defining Metal 0 in ASITIC
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Message started by DoYouLinux on Nov 14^th, 2009, 10:46pm

Title: Defining Metal 0 in ASITIC
Post by DoYouLinux on Nov 14^th, 2009, 10:46pm

Hi all,

I am trying to use ASITIC to analyze an inductor. However, in my 65nm substrate information, I cannot find the "Metal 0" as used in ASITIC.

In ASITIC document, it mentions that "Metal 0" exists in the epitaxial layer, but in my technlogy document, it does not mention about this metal in the epi layer. The metal structure starts from metal 1 above the epi layer.

How can I define the "Metal 0" in ASITIC ? In my tech file, I started the metal layer from Metal 1, and ASITIC reported an error that it cannot fine Metal 0.

Please suggest me how to do Crying or Very sad

DYL