The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Simulators >> RF Simulators >> Question about phase noise simulation result
https://designers-guide.org/forum/YaBB.pl?num=1309258199

Message started by YCY on Jun 28^th, 2011, 3:49am

Title: Question about phase noise simulation result
Post by YCY on Jun 28^th, 2011, 3:49am

Hi,

I'm designing a CML frequency divider. The schematic is as shown:

When I use PSS+PNOISE to simulate the phase noise of this divider,
I find the phase noise measured before the selector (node f_DIV3)
is larger than that after the selector (node f_SEL).
The simulation result is:

I think this result is somewhat weird since the selector is
a voltage amplifier that should not improve the phase noise.

So my question is:
Is this simulation result correct?
If yes, how can a voltage amplifier improve the phase noise of a signal?
If no, what's wrong with the simulation, do I have a wrong simulation setting?
My test condition is:
input frequency fin=3.4 GHz
modulus=8 (P0=P1=P2=0, P3=1)
fSEL=fDIV3=425 MHz

PSS setup:
shooting engine is used.
fund=425 MHz
No. of harmonics=16
errpreset=conservative

PNOISE setup:
sweeptype=relative
relative harmonic=1
maximum sidebands=16
sweep frequency=10k~10M
probe voltage: fDIV3 and fSEL

Could anybody please help me figure out this question?

Thanks in advance.

YCY

Title: Re: Question about phase noise simulation result
Post by YCY on Jun 29^th, 2011, 7:58am

Well, I found why.
When the noise type is set to source, Pnoise calculate the carrier-to-noise ratio rather than real phase noise or timing jitter.
Because the divider is a driven system and only the output threshold crossing is of concern.
One should use jitter to calculate its phase noise.
The detailed setup can be found by searching "Jitter Measurements Using SpectreRF" on Google.

Title: Re: Question about phase noise simulation result
Post by neoflash on Jun 29^th, 2011, 11:07pm

Interesting topic.

I was long for a discussion with SpectreRF expert face to face on their RF simulators' phase noise sim. However, I can always only reach to some AE. No real talk ever.

I was always expecting the pnoise in source mode with driven circuit to give also the correct phase noise plot. However, my self also encounter one weird phenomenon recently. I'm still working with Cadence AE hopelessly.

Do you have any solid source saying that source mode won't work for driven circuits? I ever seen an application note adopted source mode for VCO.

Title: Re: Question about phase noise simulation result
Post by YCY on Jun 30^th, 2011, 2:37am

Hi, neoflash,

I think I mislead you by saying "... divider is a driven system..."
Actually my point is that "only the threshold crossing is of concern."

Because I am simulating a frequency divider, only the timing jitter is important.
The source mode won't work here since the AM noise may dominate the plotted phase noise,
and lead to a useless information.
That's what happened in my previous post.

In fact, I am also curious why the PM-only phase noise in the modulated mode is not the same as Jee in jitter mode.
I used to consider the PM-only phase noise as the PSD of phase error, and shouldn't it be the same as 20log(|2*pi*f*Jee|)?

By the way, could you also share the experience you encounter, I am also interested in that.

Thanks

YCY

Title: Re: Question about phase noise simulation result
Post by neoflash on Jun 30^th, 2011, 10:22am

Guess what? We could be lucky if Ken can share some of his inputs on this. He and Andrew are the people who really know the insider info. LOL.

I agree that the noise output in sources mode will be dominated by the AM noise. Currently, I'm getting stuck in this because for some reason the jitter mode doesn't run. And the source mode only gave me blended AM/PM noise.

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jun 30^th, 2011, 11:04am

The so-called 'sources' mode produces SSB noise. If you plot then plot the 'phase noise' you are actually plotting the SSB noise power normalized to the carrier (the give away is in the units, which are dBc/Hz). I know these terms are either meaningless ('sources') or misleading ('phase noise') and I repeatedly encouraged the Cadence simulation environment developers to change them, but was unsuccessful. I don't know where the term 'sources' comes from, but the term 'phase noise' was used because back in the early days of RF simulation we were primarily focused on computing oscillator phase noise, and in that situation normalized noise is effective proxy for phase noise because in oscillators they are equal for most frequencies of interest.

For information about the difference between SSB noise, AM/PM noise, and jitter, see Noise in mixers, oscillators, samplers, and logic: an introduction to cyclostationary noise on www.designers-guide.org/Theory.

-Ken

Title: Re: Question about phase noise simulation result
Post by neoflash on Jun 30^th, 2011, 12:15pm

Ken,

In deed thank you for offering your inputs.

One long existing question is that why Cadence seems to use "source" mode for their VCO pnoise simulation in one of their application note. I took it as the recommended way but more knowledge seems to convince me this is not a good idea.

Regards,
Neo

Ken Kundert wrote on Jun 30^th, 2011, 11:04am:

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jun 30^th, 2011, 4:49pm

Neo,
Using 'source' mode for VCO phase noise simulation make sense for a VCO even though that mode computes normalized SSB noise rather than phase noise make sense because all oscillators produce almost exclusively phase noise in the frequencies of interest. Thus, using 'source' mode will give the same result as the more expensive am/pm mode.

-Ken

Title: Re: Question about phase noise simulation result
Post by neoflash on Jun 30^th, 2011, 5:34pm

Ken:

Thanks for the reply.

In EldoRF, it always split noise into PM noise and AM noise. In VCO sim, I still see high AM noise in the beat tone region.

Also, I don't understand why VCO has low AM at the 1st harmonic band while clock buffer and dividers have a much higher. I think both will be up-converted from DC to carrier band.

Regards,
Neo

Ken Kundert wrote on Jun 30^th, 2011, 4:49pm:

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jun 30^th, 2011, 10:27pm

Neo,
I don't know what the 'beat tone' region is.

If you want to know why the noise produced by oscillators is predominantly phase noise, see Noise in mixers, oscillators, samplers, and logic: an introduction to cyclostationary noise on www.designers-guide.org/Theory.

-Ken

Title: Re: Question about phase noise simulation result
Post by neoflash on Jul 1^st, 2011, 12:16am

Ken,

I read your slides and they are wonderful.

I understand that many oscillators will saturate their outputs in the buffering stages trailing the oscillator core. However, there are quite a few cases that these limiters still introduce AM noise.

Again, appreciate your inputs and slides.

Regards,
Neo

Ken Kundert wrote on Jun 30^th, 2011, 10:27pm:

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jul 1^st, 2011, 2:41pm

In an oscillator, amplitude noise is suppressed by the amplitude limiting mechanism of the oscillator, whereas the phase noise is not suppressed. In fact, the phase noise accumulates. That is why close-in phase noise in oscillators always dominates over the amplitude noise.

-Ken

Title: Re: Question about phase noise simulation result
Post by neoflash on Jul 1^st, 2011, 3:18pm

What if the oscillator output is buffered with a chain of CMOS inverters supplied with a noisy regulator?

Is that buffer chain going to add AM noise?

- Neo

Ken Kundert wrote on Jul 1^st, 2011, 2:41pm:

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 1^st, 2011, 6:42pm

Hi, Ken

Thanks for your suggestion. I've read your paper and slides. They are really helpful.
Yet I still have some questions:

1. Can we use the "modulated" mode and plot PM noise to analyze
the jitter or phase noise of a driven circuit, like frequency divider?
I don't really understand the difference between "jitter" and
''modulated" mode when only PM noise is considered.

2. In the slides page 21 "Removing Cyclostationarity", you say the
"noise at any frequency f1 is uncorrelated with noise at any other
frequency f2 as long as both f1 and f2 are within the passband".
I don't understand why. Since after the mixer the noises at different frequencies have been correlated,
how can they be separated by a bandpass filter?
(I borrow your picture in the paper to express my thoughts.
The redline stands for the passband of the bandpass filter.)

Could you please help me figure out these questions?
Your help is really appreciated.

Regards,

YCY

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jul 2^nd, 2011, 8:14am

Neo,
First consider the case where you have an oscillator followed by a linear amplifier which contributes white noise to the output. The noise from the amplifier will be added to the noise of the oscillator. In this case, since the noise from the oscillator is large but drops at 20dB per decade of offset frequency, there will be an offset frequency beyond which the noise will be dominated by that of the amplifier. At those frequencies the noise will be unmodulated, meaning that there will be equal amounts AM and PM noise.

Now consider the circuit you described: an oscillator followed by a chain of buffers. Presumably these buffers are acting as limiting amplifiers. Like oscillators, it is the nature of limiting amplifiers to suppress AM noise. Furthermore, since you are passing the signal through limiting amplifiers, you presumably are driving circuits that are boolean in nature (switching mixers or logic). In this case any incidental AM noise would be ignored by the subsequent circuitry. So in the case you describe, you can generally ignore the AM component of the noise.

-Ken

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jul 2^nd, 2011, 9:04am

YCY,
One obvious difference is that the modulated noise analysis extracts the phase noise S_Φ in units of radians²/Hertz whereas jitter analysis extracts the jitter in units of seconds²/Hertz. But the difference between the two is deeper than that. To see the difference between modulated noise and jitter, consider white noise added to a sine wave.

The modulated noise analysis will see equal amounts of AM and PM noise. The jitter analysis will pass the signal through an internal limiter to determine the jitter. That limiter will have the effect of converting the noise in the signal (both the AM and PM components as appropriate given the level of the threshold) to jitter. So the modulated noise analysis examines the entire signal to determine the PM noise whereas the jitter analysis only examines the noise at the threshold.

Further consider the case where you have a noise free signal that is amplitude modulated with noise. The modulated noise analysis will examine this signal and find no PM noise. But if the threshold is not at zero, the jitter analysis will find jitter.

Conversely, consider the case were you have a signal that consists of white noise and a large square wave with infinitely fast transitions. The white noise will cause the modulated noise analysis to report equal amounts of AM and PM noise, whereas the jitter analysis will find no jitter because the small amount of noise cannot affect the time of the threshold crossing because of the infinitely fast transition times of the square wave.

On your second question about noise correlation, the point is not that there is no frequency translation, but rather than the translated signals cannot be correlated because they must have different original source frequencies. In other words, because of the constraints on the passband of the filter, there is no frequency where the original source frequencies of the various translations is the same, therefore the various translations cannot be correlated.

-Ken

Title: Re: Question about phase noise simulation result
Post by Frank Wiedmann on Jul 4^th, 2011, 4:06am

In this context, the discussion I had with Ken a long time ago at http://www.designers-guide.org/Forum/YaBB.pl?num=1036850366 might also be interesting. AM and PM noise as calculated by SpectreRF are probably most meaningful for sinusoidal signals.

When you simulate the jitter of autonomous circuits (oscillators etc.) with SpectreRF, you should be aware that the default FM jitter analysis is based on modulated noise. In order to get the same analysis type as in the jitter analysis for driven circuits, you must select PM jitter. It took Andrew Beckett and me several years to get this option into ADE (see http://www.designers-guide.org/Forum/YaBB.pl?num=1158924743/4#4). See also http://www.cadence.com/community/forums/T/17940.aspx for how to interpret the simulation results.

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 4^th, 2011, 7:03pm

Hi, Ken and Frank

Thanks for your detailed description, I believe I have a further
understanding of phase noise and how SpectreRF calculate it now.
On the other hand, after going through the thread Frank provided,
I have some other questions:

1.How to determine the "threshold" in Pnoise jitter mode?
We usually set the threshold to Vdd/2 in logic circuits.
However this is an ideal value. In reality the threshold value
may vary according to many causes, like Vdd ripple, devices mismatches...and so on.
How can we precisely choose the threshold value?
Or the threshold value doesn't affect the result much?
(I myself have tried a chain of inverts with Vdd=1.2 V, and
set the threshold value from 0.4 to 0.8 V, the resulting jitter
doesn't have significant difference, the largest difference is less than 3 dB.)

2.It seems PM jitter in jitter mode is used to simulate oscillator followed by driven circuits, like buffer or divider.
Then what is FM jitter for? Is it like the PM noise in the modulated mode but just reported in the unit of second/sqrt(Hz)?

3.In the thread http://www.designers-guide.org/Forum/YaBB.pl?num=1158788102;start=all, Ken said
"...If you are in the 1/Δf 2 region, then the noise from the phase mode in the oscillator is dominating.
In this case, using strobed noise to determine the phase noise should give the same result as using
the time-averaged noise..."
I don't understand what's the meaning of "if your are in the 1/Δf 2 region".
Does it mean that we concern about the spot phase noise at a certain frequency which is in the 1/Δf 2 region?

Regards,

YCY

Title: Re: Question about phase noise simulation result
Post by neoflash on Jul 4^th, 2011, 7:44pm

It seems that as long as the block is followed by a thresholding circuit ( which seems to be always the case), strobed noise analysis is always more accurate than time-averaged analysis in phase noise and jitter analysis.

- Neo

YCY wrote on Jul 4^th, 2011, 7:03pm:

"...If you are in the 1/Δf 2 region, then the noise from the phase mode in the oscillator is dominating.
In this case, using strobed noise to determine the phase noise should give the same result as using the time-averaged noise..."

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 5^th, 2011, 12:34am

One more question,
Ken said when the divider is followed by a mixer, which is a thresholding
circuit, one should use "time domain" to strobe the noise at the threshold crossings.
(http://www.designers-guide.org/Forum/YaBB.pl?num=1158788102;start=all)
But in a receiver, shouldn't we simulate the sideband noise to carrier ratio (phase noise in the source mode)
to see the effect of reciprocal mixing?

So my question is what simulation (source or jitter mode) should we do to measure the phase noise
when the VCO is followed by a divider to change the output frequency, if this output signal is sent to a mixer as an LO?

Title: Re: Question about phase noise simulation result
Post by neoflash on Jul 5^th, 2011, 10:39am

Finally, we need Ken to confirm this.

However, I believe if your VCO + divider are clamped by some ideal voltage sources, such as an inverter biased at an ideal voltage supply, you should get the identical result since there is no AM noise left in source mode.

Otherwise, you should get more accurate result in jitter mode.

It seems that we should always use jitter mode.

Is this right, Ken?

YCY wrote on Jul 5^th, 2011, 12:34am:

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jul 5^th, 2011, 1:02pm

Let me clarify. My advice was for the case where you were simulating just the divider while anticipating that when placed in the larger circuit it would be followed by a thresholding circuit such as a mixer. In otherwords, the noise measurement you make should depend on the circuit that will eventually be affected by the noise. In the case of a divider that will be followed by a mixer, you should use sampled noise option ('time domain') because it only includes noise that occurs at or near the threshold crossings, which is the only noise that will affect the subsequent mixer.

Since the underlying noise analysis is the same, reciprocal mixing would be included in either the 'time-domain' or 'sources' noise analysis if (and only if) you include a large interfering tone at the input to the mixer. Since the mixer is not included when simulating divider alone, the question of reciprocal mixing is moot in the case I was talking about. If you include the mixer and the divider in one simulation, then my advice does not apply. In that case, the type of noise analysis you would use would be determined on the type of circuit that followed the mixer. Since continuous time filters normally follow the mixer, you would probably use 'sources' if the mixer were not included in the simulation. If the filter was included, then the type of noise analysis is determined by what follows the filter, which is presumably a sample and hold, in which case you would use a 'time-domain' noise analysis. Etc.

Hopefully you can see that you are not really tailoring your noise analysis to what is in the circuit, but rather by what follows the circuit, because you need to measure the output noise in a way that is compatible with the way the next stage would see it.

-Ken

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 5^th, 2011, 7:08pm

neoflash wrote on Jul 5^th, 2011, 10:39am:

However, I believe if your VCO + divider are clamped by some ideal voltage sources, such as an inverter biased at an ideal voltage supply, you should get the identical result since there is no AM noise left in source mode.

Hi, Neo

Yes I think you are right. No AM noise left in that situation.
But when you said "you should get the identical result",
do you mean the two results from "jitter" and "source" mode?
If so, I think we will not get the same result.

I've tried a VCO followed by a limiting amplifier and simulated
the phase noise by jitter, modulated, and source mode.
The results are different.
I think this is because the noise is calculated at the threshold crossing
in the PM jitter mode, whereas in the source mode noise is calculated in
the time-average method.
Here is my simulation result:

regards,

YCY

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 5^th, 2011, 8:05pm

Hi, Ken

Thanks for your response.
I try to rephrase your reply in the following to confirm if I really understand what you meant.

1. If VCO alone is simulated, both source or time-domain (FM jitter) analysis can be used to simulate phase noise.
Because VCO compresses the AM noise, source and time-domain analyses will give identical result.

2. If VCO+buffer is simulated and the following stage is a divider, time-domain (PM jitter) is used.
Because divider is a thresholding circuit.

3. If VCO+buffer+divider is simulated and the following stage is mixer or PFD, time-domain (PM jitter) is used.
Because mixer and PFD are thresholding circuits.

4. If a continuous-time circuit is followed, the source mode is applied.

In conclusion, the type of noise simulation depends on the circuit that follows.

BTW, could you please also answer my questions in reply#17?
I still have no idea about the answers of them, especially #1.
Thanks a lot, your help is really appreciated.

regards,

YCY

Title: Re: Question about phase noise simulation result
Post by Ken Kundert on Jul 5^th, 2011, 10:29pm

YCY,
Why, I'd think it would be obvious at this point. You set the threshold equal to the threshold of the subsequent circuit. If you want to determine the threshold of the subsequent circuit, sweep the input voltage to the circuit while calculating the gain, the threshold would be where the gain is the maximum.

-Ken

Title: Re: Question about phase noise simulation result
Post by neoflash on Jul 5^th, 2011, 10:53pm

If YCY is concerned with uncertainty of the threshold voltage, I suggest you do some simulation with different values.

They should not vary too much. And the variation is also something that your design should cover.

- Neo

Ken Kundert wrote on Jul 5^th, 2011, 10:29pm:

Title: Re: Question about phase noise simulation result
Post by YCY on Jul 6^th, 2011, 12:31am

Ken Kundert wrote on Jul 5^th, 2011, 10:29pm:

Hi, Ken

Thanks, that's what I want to know.

Hi, Neo

Thanks, your suggestion is also useful.

regards,

YCY

Title: Re: Question about phase noise simulation result
Post by Frank Wiedmann on Jul 6^th, 2011, 2:19am

There are a few more things to watch out for when using modulated pnoise.

First, the definition for AM and PM noise in the formulas used by ADE has been changed recently (in IC 5.10.41.500.6.144 and IC6.1.4.500.7, see http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;solutionNumber=11663732). For an ideal sine source with white additive noise, AM and PM noise now have the same value as USB and LSB noise. Before that, AM and PM noise were 3 dB lower.

Second, there may be a bug in the formulas that ADE uses to compute AM and PM noise. So far, I have never used modulated pnoise because jitter analysis is generally more useful in my designs. However, due to the recent discussions, I wanted to examine modulated pnoise a little more closely. So I created the attached test circuit (the box is the multiplier from ahdlLib), expecting only AM noise at node am and only PM noise at node pm. However, this is not the result I get from SpectreRF and ADE. Looking at the results more closely, it seems like the correlation between the sidebands might be taken into account with only half of the correct value. I have submitted this to Cadence as Service Request 42540676, they are currently looking into it.

If there is a bug in modulated pnoise, it probably also applies to FM jitter for autonomous circuits, which is based on modulated pnoise. I have not checked this, though.

Here is the netlist for the test circuit:

Code:

// Generated for: spectre
// Generated on: Jul 6 10:43:58 2011
// Design library name: fw_test
// Design cell name: test_mod_noise_am_pm
// Design view name: schematic
simulator lang=spectre
global 0

// Library name: fw_test
// Cell name: test_mod_noise_am_pm
// View name: schematic
Vam (m_am 0) vsource type=sine sinedc=0 ampl=1 sinephase=0 freq=1G
Vpm (m_pm 0) vsource type=sine sinedc=0 ampl=1 sinephase=90 freq=1G
Vsig_pm (pm mn_pm) vsource type=sine ampl=1 freq=1G
Vsig_am (am mn_am) vsource type=sine ampl=1 freq=1G
mult_pm (n_pm m_pm mn_pm) multiplier
mult_am (n_am m_am mn_am) multiplier
Rpm (n_pm 0) resistor r=1K
Ram (n_am 0) resistor r=1K
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
checklimitdest=psf
pss pss fund=1G harms=1 errpreset=conservative annotate=status
mod1 ( am 0 ) pnoise sweeptype=relative relharmnum=1
+ start=0 stop=500M maxsideband=5 annotate=status
mod2 ( am 0 ) pnoise sweeptype=relative relharmnum=1
+ start=-(0) stop=-(500M) maxsideband=5 noisetype=correlations
+ cycles=[0 -2] annotate=status
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub currents=all subcktprobelvl=5 \
saveahdlvars=all
ahdl_include "/tools/ic5141isr148/tools/dfII/samples/artist/ahdlLib/multiplier/veriloga/veriloga.va"

Title: Re: Question about phase noise simulation result
Post by Frank Wiedmann on Jul 14^th, 2011, 1:51am

I have now received an answer from Cadence. As it turns out, the formulas used for calculating AM and PM noise assume bandlimited noise. If I limit the bandwidth of the noise source to less than the modulation frequency before modulating it, I get the correct result.

Here is the netlist for the modified circuit:

Code:

// Generated for: spectre
// Generated on: Jul 14 10:26:54 2011
// Design library name: fw_test
// Design cell name: test_mod_noise_am_pm
// Design view name: schematic
simulator lang=spectre
global 0

// Library name: fw_test
// Cell name: test_mod_noise_am_pm
// View name: schematic
Vnpm (n_pm 0) vsource type=dc noisevec=[ 0 1 900M 1 950M 0 ]
Vnam (n_am 0) vsource type=dc noisevec=[ 0 1 900M 1 950M 0 ]
Vsig_pm (pm mn_pm) vsource type=sine ampl=1 freq=1G
Vsig_am (am mn_am) vsource type=sine ampl=1 freq=1G
Vpm (m_pm 0) vsource type=sine sinedc=0 ampl=1 sinephase=90 freq=1G
Vam (m_am 0) vsource type=sine sinedc=0 ampl=1 sinephase=0 freq=1G
mult_pm (n_pm m_pm mn_pm) multiplier
mult_am (n_am m_am mn_am) multiplier
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
checklimitdest=psf
pss pss fund=1G harms=1 errpreset=conservative annotate=status
mod1 ( am 0 ) pnoise sweeptype=relative relharmnum=1
+ start=0 stop=1G maxsideband=5 annotate=status
mod2 ( am 0 ) pnoise sweeptype=relative relharmnum=1
+ start=-(0) stop=-(1G) maxsideband=5 noisetype=correlations
+ cycles=[0 -2] annotate=status
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub currents=all subcktprobelvl=5 \
saveahdlvars=all
ahdl_include "/tools/ic5141isr148/tools/dfII/samples/artist/ahdlLib/multiplier/veriloga/veriloga.va"

Title: Re: Question about phase noise simulation result
Post by radiohead on Nov 24^th, 2015, 3:44am

Hi all,

Very interesting and helpful comments. Following the discussion, i use strobed PNoise (time domain) with spectreRF to find the jitter of a frequency divider. In an effort to correlate time domain pnoise with sources pnoise i would expect that if i average the total noise (V^2/Hz) at a certain frequency offset, then this quantity must equal the output noise in (V^2/Hz) estimated using the sources method. Although this is not what i get from spectreRF.

Title: Re: Question about phase noise simulation result
Post by Frank Wiedmann on Nov 25^th, 2015, 12:53am

In general, there is no direct correlation between time domain (strobed, jitter) and averaged ("sources") pnoise results (see http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;DocumentType=tbshtng;solutionNumber=20321193).

Title: Re: Question about phase noise simulation result
Post by deba on Feb 21^st, 2018, 3:54am

Hi,

It is a very useful thread.

I have few questions, I hope someone can answer.

If someone is designing a clock buffer circuit. The AM noise can be removed by passing the clock output through an ideal VCVS with gain of 1, centred around Vdd/2. Thus, there is only PM noise present in the circuit. Here the sources (time average) method can be used to calculate the phase noise.

But when I use PM-jitter for this circuit, the results are almost 2x compared to sources. Can some one please help in this? Is the method of using VCVS with voltage limit correct?

Thanks

Title: Re: Question about phase noise simulation result
Post by deba on Feb 21^st, 2018, 10:54pm

A follow up question.

Passing the clock output through an ideal VCVS of gain=1 and voltage limits of +/-100 mV around the threshold(mid-value) suppresses the AM noise? Is the above statement correct?