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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Parasitic extraction of a metal square in cmos process
https://designers-guide.org/forum/YaBB.pl?num=1458598110

Message started by mixed_signal on Mar 21^st, 2016, 3:08pm

Title: Parasitic extraction of a metal square in cmos process
Post by mixed_signal on Mar 21^st, 2016, 3:08pm

Hi, I want to find the parasitic of a metal square of given area in a cmos process (tsmc65nm) using regular lvs, xrc flow. But i do not have a schematic for this metal for lvs, xrc.

Some people suggest about using lvsres. But I do not know if it exists for tsmc65nm process. If it exists then what is layout and schematic name for M9?

Title: Re: Parasitic extraction of a metal square in cmos process
Post by raja.cedt on Mar 21^st, 2016, 4:49pm

Hi Use a metal resister in the middle of metal and attach pins. This should clear your LVS now.