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Measurements >> Phase Noise and Jitter Measurements >> weird phenomenon of vco phase noise simulation?
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Message started by lwzunique on Mar 6th, 2017, 8:36pm

Title: weird phenomenon of vco phase noise simulation?
Post by lwzunique on Mar 6th, 2017, 8:36pm

Hi everyone!
I came across a weird question about VCO phase noise simulation.
The circuit structure is as shown below, VCO+ VCO_BUFFER + DIV_BY_2(CML).
when doing pss+pnoise simulation of single VCO or VCO+ VCO BUFFER, the phase noise results is as shown in case 1. VCO output phase noise is -116dBc/Hz@1MHz, and the buffer's output is a little bit worse.

the weird thing is ,when I added div_by_2 block, the phase noise of VCO_OUTPUT AND BUFFER’s output decline rapidly. -93dBc/Hz@1Mhz,-60dBc/Hz@1MHz,repectively. but the div_by_2's output signal's phase noise is -122dBc/Hz@1MHz. [img][/img]

why?


Title: Re: weird phenomenon of vco phase noise simulation?
Post by cheap_salary on Mar 6th, 2017, 9:05pm

Do you surely specify correct harmonic for divide-by-2 case ?

Title: Re: weird phenomenon of vco phase noise simulation?
Post by lwzunique on Mar 6th, 2017, 9:16pm


cheap_salary wrote on Mar 6th, 2017, 9:05pm:
Do you surely specify correct harmonic for divide-by-2 case ?

the frequency of divide-by-2 is 2.119 GHz, so I set the beat frequency equals to 2.119 GHz in pss setting, and number of harmonic is 15.

but the result is almost the same.

Title: Re: weird phenomenon of vco phase noise simulation?
Post by cheap_salary on Mar 6th, 2017, 10:24pm

Wrong, as you are always.

Title: Re: weird phenomenon of vco phase noise simulation?
Post by lwzunique on Mar 7th, 2017, 2:34am


cheap_salary wrote on Mar 6th, 2017, 10:24pm:
Wrong, as you are always.

could you please show me how to do, thank you.@cheap_salary

Title: Re: weird phenomenon of vco phase noise simulation?
Post by lwzunique on Mar 7th, 2017, 3:18am


cheap_salary wrote on Mar 6th, 2017, 10:24pm:
Wrong, as you are always.

at last, I find the reason, relative harmonic should be 2, thank you!@cheap_salary.

Title: Re: weird phenomenon of vco phase noise simulation?
Post by cheap_salary on Mar 7th, 2017, 3:39am


lwzunique wrote on Mar 7th, 2017, 3:18am:

cheap_salary wrote on Mar 6th, 2017, 10:24pm:
Wrong, as you are always.

at last, I find the reason, relative harmonic should be 2, thank you!@cheap_salary.
Correct.

Relative harmonics have to be:
2 for VCO
2 for VCO_Buffer
1 for CML_DIV2.

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