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Design >> Mixed-Signal Design >> Problem with Ideal current steering DAC in a CT DSM
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Message started by polyam on Mar 19th, 2017, 8:57am

Title: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 19th, 2017, 8:57am

Hi,

I am designing a CT delta sigma modulator. I just want to focus on the first integrator and current steering DAC. I have a 3-bit quantizer and my first integrator is an active-RC integrator. You can see my first integrator in the picture.
I’ve implemented a 3-bit ideal current steering DAC in a way that you see in the picture. When I use this ideal DAC, the transient signal, at the nodes 1 and 2, I showed in the integrator, looks kind of weird to me. My supply voltage is 1.2 V and the CM level is 0.6 V. But the level of signal it not located at a level I expected.
When I replace the ideal DAC with a transistor level one, the CM level goes to a level that it should be.
I have to mentioned that both ideal and real DACs give me a correct result in terms of output spectrum!!!
This is really important for me because when I am trying to test my op-amp individually (transistor level) with the ideal DAC, my system does not work and it is not because of the op-amp. I think it is because of the ideal DAC. I am guessing this because when I use both op-amp and DAC at the transistor level I don’t have any problem and my system works well.
Can anyone help me to understand what the cause is and how to modify it?

Many thanks

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 19th, 2017, 8:58am

This pic shows the ideal DAC I used.

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 19th, 2017, 9:00am

This pic shows the signal at 1 and 2 when I use Ideal DAC and Ideal op-amp

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 19th, 2017, 9:03am

And this is the signal at 1 and 2 when I use a real DAC and an Ideal op-amp.
I have to say that when I use a real DAC and a real op-amp I get the same result.
Real: Transistor level implementation

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by cheap_salary on Mar 20th, 2017, 5:46am

Both Idac_p and Idac_n are source direction.
Why ?

See http://www.designers-guide.org/Forum/YaBB.pl?num=1461333335

BTW, have you seen second edition of Schreier's book ?
https://www.amazon.com/Understanding-Delta-Sigma-Converters-Microelectronic-Systems/dp/1119258278/ref=pd_rhf_ee_p_img_3?_encoding=UTF8&psc=1&refRID=7A34EXXW8XV9R8AXWK4P

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 20th, 2017, 5:55am

Hi,

Thank you for your reply. So, you mean one of them must be in a sink direction even if one of the current sources is excited with vin_p (D) and the other is excited with vin_n (D_b)?
Am I understanding your point?


I just saw the link to the book. No, I've not seen that. like to see that.


Thanks,

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by cheap_salary on Mar 20th, 2017, 5:58am


polyam wrote on Mar 20th, 2017, 5:55am:
So, you mean one of them must be in a sink direction
even if one of the current sources is excited with vin_p (D)
and the other is excited with vin_n (D_b)?
Yes.

See Figure-4.5 in http://www.designers-guide.org/Forum/YaBB.pl?num=1461333335

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 20th, 2017, 6:01am

Thank you. I'll follow the clue you gave me. Thanks for that.
But it is really appreciated if you clarify more for me what I've done incorrectly. I like to know the reason.
OK. Let's say the model is wrong. Why do I get a correct result with a wrong model?
As I mentioned, when I use this wrong model and ideal op-amp I get a correct spectrum with the expected SQNR?

Thank you

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by cheap_salary on Mar 20th, 2017, 6:19am

Differential DAC.
For D=1, Idac_p=1 and Idac_n=-1
For D=0, Idac_p=-1 and Idac_n=1

Your DAC coding is not differential.

Your DAC is single-ended coding.
For D=1, Idac_p=1 and Idac_n=0
For D=0, Idac_p=0 and Idac_n=1

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by polyam on Mar 21st, 2017, 8:11am

Hi

Really thanks. Problem solved!

Title: Re: Problem with Ideal current steering DAC in a CT DSM
Post by Frank_Heart on Nov 16th, 2017, 2:55pm

Inspiring discussions!

So the single-end FBDAC will alter the CM of input stage, by R*(0.5*IDAC_FS)?

I guess I am still confused that, from polyam's simulations, the input CM with ideal FBDAC is 1.5V, while it is 625mV with real FBDAC? Shall this CM be moved by R*(0.5*IDAC_FS)?  Why there is such a big difference between the two?

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