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Simulators >> Circuit Simulators >> pss sweep with veriloga
https://designers-guide.org/forum/YaBB.pl?num=1511182852

Message started by eeBismarck on Nov 20^th, 2017, 5:00am

Title: pss sweep with veriloga
Post by eeBismarck on Nov 20^th, 2017, 5:00am

Q1
I am simulating an oscillator 24MHz with trimming (8-bit) ability. There is a variable called "TRIM_CODE" as decimal value in my test bench. I use a veriloga model to translate TRIM_CODE into binary code and connect them to my oscillator. Then I use pss to check frequency and some times it can't convergence.
Q2
TO solve convergence problem, I remove veriloga model, and make 8 vdc by setting 8 variable D7...D0 in global variable from TRIM_CODE by equations. It seems convergence problem solved, however, if I sweep TRIM_CODE in pss, the result doesn't change. Only default value of TRIM_CODE is calculated by pss.

Conclusion
I just want to know how I can sweep TRIM_CODE in pss without such strange problem ? Is there any one can help ?

Thanks !

Title: Re: pss sweep with veriloga
Post by Geoffrey_Coram on Nov 20^th, 2017, 7:48am

You should probably post the code for your veriloga model; I can think of a couple ways you might be converting a design variable to binary.

Title: Re: pss sweep with veriloga
Post by sheldon on Dec 1^st, 2017, 5:30pm

eeBismark,

Not sure I understand what you are saying in Q2. It seems like you
are saying that you are tuning the oscillator during a PSS simulation.
In that case, there would be multiple steady-state solutions, one for
each sweep value. Not sure that this use model will work.

Sheldon