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Design >> High-Speed I/O Design >> Quantifying Eye Diagram for high-speed SERDES channel
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Message started by aguntuk on Jan 19^th, 2018, 8:54am

Title: Quantifying Eye Diagram for high-speed SERDES channel
Post by aguntuk on Jan 19^th, 2018, 8:54am

Hello,
I need help quantifying Eye Diagram. I have to quantify Eye Diagram at the end of my Thesis for my Serial Link channel. Viewing an Eye Diagram, I can say probably whether it is bad or good. But for the hypothesis or any conclusion qualitative analysis is not enough. I need to have quantitative analysis. I know what parameters are there like jitter, eye width, height, crossing level etc. etc. But how to say up to which value of parameters the eye diagram is good. like how can I decide that like 35% BER or x ps jitter is tolerable for the serial link (Though it depends on circuit & signaling techniques etc...)? Simply to ask what separates a good ee diagram from a bad one?

If you have any note or suggestion or anything regarding my specific question will be appreciated also.

Title: Re: Quantifying Eye Diagram for high-speed SERDES channel
Post by repah on Apr 17^th, 2018, 2:46pm

https://3.bp.blogspot.com/-p8AaUls28Zo/V1cxhlEBfBI/AAAAAAAABBc/Eez7hacJeOcvbl-3ElpzMIFzRvJi_TOzwCLcB/s1600/36.jpg

(copy whole link and put in browser)