The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Modeling >> Behavioral Models >> Verilo A model
https://designers-guide.org/forum/YaBB.pl?num=1530621118

Message started by ouijdane on Jul 3^rd, 2018, 5:31am

Title: Verilo A model
Post by ouijdane on Jul 3^rd, 2018, 5:31am

Hello,

I want to write a verilog A code of a space state average model of a dc dc boost converter.

Can anyone tell me the first step and howa should I proceed?

Thank you in advance.

Title: Re: Verilo A model
Post by Geoffrey_Coram on Jul 5^th, 2018, 12:24pm

I don't know what a "state space average model" is.

What do you want as your inputs and outputs of this model? Can you write equations for currents and voltages, or is a state-space models at a higher level? (in which case, Verilog-A might not be the right language)

Title: Re: Verilo A model
Post by Frank Wiedmann on Jul 6^th, 2018, 9:00am

If you want to learn about state space average models of dc/dc converters, the books by Christophe Basso (http://cbasso.pagesperso-orange.fr/Spice.htm) are probably a good starting point. If you want to learn Verilog-A, you can start right on this site at http://www.designers-guide.org/VerilogAMS/