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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> high frequency source VS. long rise time(parallel RC) in transient simulation https://designers-guide.org/forum/YaBB.pl?num=1535113463 Message started by Peng_Li on Aug 24th, 2018, 5:24am |
Title: high frequency source VS. long rise time(parallel RC) in transient simulation Post by Peng_Li on Aug 24th, 2018, 5:24am Hi, the title is a brief description of the problem. Here are the details. For simplicity, my circuit is composed of two parts, part 1 is a PULSE current souce in series with a resistor and a inductor, described in Verilog-A. Part 2 is a parallel RC circuit, excited by another current source whose magintude is the dissipated power of part one, described in Verilog-A or SPICE. There are connections between the two circuits. Firstly, the dissipated power of part 1 is delivered to part 2 by a VCCS (voltage-controlled current source) module. Secondly, the values of resistor and inductor in part 1 circuit varies with the node voltage VT1 in part 2 cirucit. My problem is that, the PULSE current souce in part 1 circuit varies at high frequency (the period can be several nanoseconds), however, it takes a long time for the RC in part 2 circuit to rise up (the time can be several seconds). (specific values of RC is shown in the following code) Actually, I tried to change the PULSE souce into a step source, to avoid this problem, and it worked (as shown in the following code). But I want to solve this problem eventually. Is there any way to solve this problem? Maybe, delay the variation in part 1, using a counter within a if...else... block in verilog-A module of part 2 circuit? Any help would be greatly appreciated. Sincerely. The code for each module is shown as follows. step current source in HSPICE Code:
PWL current source Code:
Top level module Code:
Part 1 circuit Code:
Part 2 circuit Code:
VCCS Code:
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Title: Re: high frequency source VS. long rise time(parallel RC) in transient simulation Post by Peng_Li on Aug 24th, 2018, 6:52am Diagram of the circuits are shown here.[img][/img] |
Title: Re: high frequency source VS. long rise time(parallel RC) in transient simulation Post by Ken Kundert on Aug 24th, 2018, 9:29am Use PSS analysis to directly find the steady-state behavior. -Ken |
Title: Re: high frequency source VS. long rise time(parallel RC) in transient simulation Post by Peng_Li on Aug 26th, 2018, 7:45pm Ken Kundert wrote on Aug 24th, 2018, 9:29am:
Thanks. I didn't use PSS before. From Google results, it seems that the PSS analysis is mostly used in Cadence, and applied to oscillator in RF analysis. Since I need to calculate the power of Part 1 circuit, and delivery the value of power to Part 2 circuit, I am not sure whether this can be done in Candence. |
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