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Design Languages >> Verilog-AMS >> Wire in Verilog A
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Message started by Maverick_shastry on Sep 26^th, 2018, 9:17am

Title: Wire in Verilog A
Post by Maverick_shastry on Sep 26^th, 2018, 9:17am

Hello,
Is there a way to specify the wire assignments in Verilog A ?

This is what I mean:
wire A = reg_001[1];
wire B [2:0] =reg_002[3:1];
wire C =reg_003[4];

Regards
Shastry

Title: Re: Wire in Verilog A
Post by Ken Kundert on Sep 26^th, 2018, 12:52pm

No.

There are no digital wires in Verilog-A. All the wires are electrical.

-Ken