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Message started by blue111 on Jun 30th, 2019, 1:12am

Title: Phase Frequency Detector without dead zone
Post by blue111 on Jun 30th, 2019, 1:12am

How does the two inverter delay stage in Figure 6.14 on page 265 of Design of CMOS RF Integrated Circuits and Systems helps to eliminate dead zone in Phase Frequency Detector ?















The book version adapts the original version ( Cell-Based Fully Integrated CMOS  Frequency Synthesizers ) with slight modification.

Any idea why the book version does not require the feedback signal of DOWN signal ?


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