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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Class E Power Amplifier Questions https://designers-guide.org/forum/YaBB.pl?num=1595035104 Message started by blue111 on Jul 17th, 2020, 6:18pm |
Title: Class E Power Amplifier Questions Post by blue111 on Jul 17th, 2020, 6:18pm I have some questions about Class E Power Amplifier 1) From page 183 of Advances in Electronics, Communication and Computing , (a) why Maximum output power is calculated as 0.577 Vdd2 / R ? (b) What does it mean by Vgs (min) = 5% of Vdd = 0.09 V and Vgs (max) = 7% of Vdd = 0.126 V. Therefore Vgs value will be in between 0.09 and 0.126 V ? 2) From Figures 4 and 5 on page 3 of A Class-E RF Power Amplifier with a Novel Matching Network for High-Efficiency Dynamic Load Modulation , (a) how to determines values of all the values of capacitors and inductors of both the input and output impedance matching networks ? (b) how to use Spice software to simulate if it does not have smith chart plotting capability ? (c) How to bias the two pull-up inductors (Lrf, Ldriver) and two resistors (Rb1, Rb2) ? (d) How does the proposed digitally-controlled matching network works ? |
Title: Re: Class E Power Amplifier Questions Post by blue111 on Aug 18th, 2020, 3:00am How to do impedance matching for the following PA circuit ? |
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