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Simulators >> Circuit Simulators >> Switched capacitor stb simulation issue
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Message started by iVenky on Aug 30^th, 2020, 9:50am

Title: Switched capacitor stb simulation issue
Post by iVenky on Aug 30^th, 2020, 9:50am

Hi,

I am trying to run stability sims for a switched capacitor op-amp circuit as shown.

I tried both ac and tran stb (not evaluated pstb yet).

I observe that in some corners, the frequency spectrum @ low frequencies (<10kHz) has weird issues.

Do you know what is causing this and how to solve this?

I tried enabling dc pivot check and pivot. Doesn't solve the issue. Also tried placing a 1G resistance parallel to C2 to provide dc feedback path; doesn't solve the problem either.

Title: Re: Switched capacitor stb simulation issue
Post by iVenky on Sep 8^th, 2020, 6:01pm

Hi,

Any suggestions would be greatly appreciated.

Thanks :)

Title: Re: Switched capacitor stb simulation issue
Post by Ken Kundert on Sep 8^th, 2020, 7:55pm

There is not really enough information to go on. Two issues that you should resolve are:

Quote:

ac and tran stb

Not sure what what that means. If you are using AC analysis, you should stop. To measure loop gain and stability you should be using the stb analysis. As far as I know there is no tran stb analysis, so you should describe what you mean by that.

Quote:

the frequency spectrum @ low frequencies (<10kHz) has weird issues

That is just to vague to allow me to offer any help.

And what are the two curves in the graph.

-Ken

Title: Re: Switched capacitor stb simulation issue
Post by iVenky on Sep 8^th, 2020, 11:50pm

Sorry, if I wasn't clear before.

First, I just did stb analysis by placing a 1G feedback resistance to make the DC converge.

Second, I ran transient simulation and then ran stb (By enabling prevoppoint in the STATE-FILE PARAMETERS options window). This runs stb using the small signal parameters available at the tran end time I guess, right?

What do you think is a good way to simulate stb for a switched capacitor network like the one shown above? I tried pstb but I think pstb works well when phi1 and phi2 circuits are same (like in chopping or switched cap cmfb), right? Does it work well with the circuit shown above? Also, it's an integrator (not an amplifier) so obtaining periodic operating point is not that straightforward.

Thank you very much for your reply!

Title: Re: Switched capacitor stb simulation issue
Post by Ken Kundert on Sep 11^th, 2020, 4:12pm

You should use pstb analysis as it is the most realistic. You can use a 'frozen' AC analysis for an extra check if you like to give yourself more confidence, but it should not be at the expense of a pstb analysis. With the pstb analysis you are testing your circuit in the same way it will be used, whereas trying to us AC analysis creates an artificial situation that does not really match the way the circuit works.

It is also a good idea to run simple transient. Normal stb analysis does not cover extreme situations, such as when the circuit is seeing a rapid step on its input which would cause the circuit to go into slew-rate limiting. Slew rate limiting is often a source of large-signal instability. I don't think this particular circuit is really subject to large-signal stability issues, but it is always good to check. To check large-signal stability you apply large steps that change very rapidly. It is good to also set maxstep to a small value. Then look for ringing that is unexpected or excessive.

-Ken

Title: Re: Switched capacitor stb simulation issue
Post by iVenky on Sep 11^th, 2020, 6:33pm

Hi Ken,

Thanks so much for your reply. I appreciate your time. What's "frozen" ac analysis?

Also, I am not sure of pss converging for an integrator when I try to do pstb analysis. I have seen documents online for running pstb for switched capacitor amplifier but not for a switched capacitor integrator.

Title: Re: Switched capacitor stb simulation issue
Post by Ken Kundert on Sep 12^th, 2020, 3:18am

An AC analysis is 'frozen' in this situation because it is applied at a fixed operating point, meaning that the clocks are frozen.

Yes, open loop integrators are always problematic, and are never used in practice. It is always better to make your test circuits as close to the real circuit as possible. Some times that is hard with clocked integrators because PSS analysis requires the circuit be periodic, but when you include the rest of the circuit you end up with a system that is not periodic. None the less, you have to try to get as close to the real application as you can.

-Ken

Title: Re: Switched capacitor stb simulation issue
Post by iVenky on Sep 14^th, 2020, 11:10am

Hi Ken,

Thanks for the reply. You mean like if this is used in an SDM, then I should include the entire SDM (or an equivalent model) so that it converges? Is that what you mean?

Title: Re: Switched capacitor stb simulation issue
Post by Ken Kundert on Sep 14^th, 2020, 10:33pm

No, see that is the rub. You cannot simulate a ΔΣ modulator because it does not have a periodic operating point.

In other words, you want to simulate the circuit within a representative environment so your results are representative, but sometimes you cannot. This is why you added the large resistors around the integrator. Those resistors are not represenative, but you need to something so the circuit has a fixed operating point. The trick is to come up with a test circuit that allows you to simulate what you need while also being representative of the actual circuit.

Unfortunately, I have no recommendation.

-Ken