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Design >> Analog Design >> chip layout: PCI vs OVL
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Message started by Horror Vacui on Mar 14th, 2022, 8:04am

Title: chip layout: PCI vs OVL
Post by Horror Vacui on Mar 14th, 2022, 8:04am

Hi guys,

The technology I will shortly use have both PCI (process control image) and OVL (overlay) layout cells for the chip-level layout, which should be placed within a given distance. There are DRC checks to check it. As far as I understand both of these helps the positioning of the reticles. OVLs should be used for every chip, while PCI should be used within a given chip, multiple times. Do you know what is the difference between them? Looking into cells has not helped me, and sadly consulting multiple documents of the technology has not enlighten me, and we have no official support for the technology (seemed better in the budgeting excel table I guess). The difference between them seems to be only logical and their purpose seems to be the same.

Thanks,
Zoltan

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