Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
AMS-simulator on Windows	Pavel	1	2352	Feb 24^th, 2012, 7:37am By: Geoffrey_Coram
problem in simulation	rakeshkumar	8	8643	Feb 23^rd, 2012, 8:37am By: boe
ams simulation: how to use this file which includes all views of the cells	xuedashun	1	2414	Feb 13^th, 2012, 5:24am By: topquark
ADS simulator IC-CAP	Polux	0	1766	Feb 8^th, 2012, 12:47am By: Polux
AMS elaborate errors	ritchie cheung	1	5177	Jan 26^th, 2012, 6:14am By: Geoffrey_Coram
simulate veriloga model using spectre only	xuedashun	2	3103	Jan 12^th, 2012, 11:15am By: Geoffrey_Coram
paramdef with spectre	tupak	1	2182	Jan 12^th, 2012, 11:14am By: Geoffrey_Coram
How to use multi CPU with ams	Kamal	10	9714	Nov 8^th, 2011, 1:11am By: Coles
$rdist_xxx not supported outside the analog block in AMS Designer	ywguo	4	6174	Nov 4^th, 2011, 5:24am By: Geoffrey_Coram
How to force an unknown state to 0V or 1.8V?	Kamal	10	2230	Nov 1^st, 2011, 4:22am By: boe
NCELAB -Segmentation Fault	manasti	0	2023	Oct 10^th, 2011, 2:56am By: manasti
Standard cells unresolved in myDesign	ywguo	1	2510	Oct 9^th, 2011, 5:34am By: ywguo
AMS-ADE multiple sdf command files	Kamal	2	3766	Sep 22^nd, 2011, 6:18am By: Kamal
E2L convert one analog rising edge into two edges in digital domain	ywguo	6	1468	Sep 19^th, 2011, 6:53pm By: ywguo
simVision and calculator	ywguo	1	3040	Sep 14^th, 2011, 8:39pm By: sunil24X7
temperature variation on AMS transient simulations	HdrChopper	4	7793	Sep 2^nd, 2011, 5:50am By: boe
Open source Verilog-AMS "simulator" for RF modeling?	tonyc	1	3522	Aug 14^th, 2011, 2:15pm By: tonyc
working with wreal variable	SARAM	12	11153	Aug 11^th, 2011, 12:58am By: SARAM
Hierarchy editor not descending all the way down the hierarchy	nrk1	4	966	Jul 19^th, 2011, 3:46am By: nrk1
How to do Verilog/VerilogA co-simulation , using cadence ams ? urgent	dongzz201	2	6808	Jul 3^rd, 2011, 6:20pm By: dongzz201

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