Designer’s Guide Community

Pages: 1 ... 15 16 17

Subject	Started by	Replies	Views	Last post
Switch model	noreng	7	10175	Jul 20^th, 2005, 3:23am By: Andrew Beckett
Modeling PLL phase noise with Verilog-A	Samir	1	5212	Mar 8^th, 2005, 1:27am By: Andrew Beckett
Topic on design reuse with aid of VerilogA/AMS	fastsim	0	908	Apr 12^th, 2004, 10:31am By: fastsim
Transceiver Model	Siddharth Singh (Guest)	1	4184	Apr 2^nd, 2004, 1:40am By: Frank Wiedmann
ideal CMFB (HSPICE)	Fred (Guest)	1	1467	Dec 20^th, 2003, 3:08pm By: Jitter Man
-2 slope from white phase noise	Yiming (Guest)	1	5167	Oct 16^th, 2003, 5:49pm By: Ken Kundert
Extracting Jitter for divider	Jason	9	4485	Sep 8^th, 2003, 5:50pm By: Ken Kundert
Spectre's svcvs error ?	gilbertsee	9	2331	Jul 16^th, 2003, 11:08pm By: gilbertsee
Optical Noise modelling	Dr.Berns	0	3758	May 17^th, 2003, 9:08pm By: Dr.Berns
Jitter Modeling	Frank Wiedmann	3	7369	Oct 10^th, 2002, 3:57pm By: Ken Kundert

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