Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
spur question of fft spectrum in ADC	cchen	7	6542	Jul 22^nd, 2014, 8:05am By: eternity
Role of Dummy capacitors in SAR ADC	eternity	4	4816	Jul 10^th, 2014, 5:30pm By: RobG
Non Overlapping Circuit	AMSA	2	2461	Jul 10^th, 2014, 5:27pm By: RobG
how to build EFT	bsaqycx	3	3282	Jul 8^th, 2014, 12:06pm By: loose-electron
analog sense amplifiers	Mir	0	1475	Jul 8^th, 2014, 10:01am By: Mir
multiple-edge-triggered latch	aaron_do	0	1255	Jul 7^th, 2014, 7:20pm By: aaron_do
Process only, Mismatch only, or 'All'	jockeymonto	1	1661	Jul 6^th, 2014, 3:59pm By: loose-electron
EVM(error vector magnitude) measurement in Spectre	praveenmv2009	0	1265	Jul 2^nd, 2014, 11:19pm By: praveenmv2009
Accurate duty cycle for sampling clock in ADC	aaron_do	12	8890	Jun 26^th, 2014, 8:43pm By: aaron_do
Stability analysis of linearized vco	pmathew	0	1454	Jun 26^th, 2014, 3:04pm By: pmathew
SHA Reference Voltage Buffer	Mikay	6	5544	Jun 2^nd, 2014, 10:52am By: Mikay
How does this comparator work?	Jacki	8	7825	May 22^nd, 2014, 4:07pm By: loose-electron
Fingerprint sensor products	neoflash	0	1348	May 17^th, 2014, 2:35pm By: neoflash
Bets way to check if PLL locked?	bigball	1	1873	May 16^th, 2014, 1:51pm By: loose-electron
How to generate the synchronized clock signals for two different grounds.	Jacki	7	6603	Apr 24^th, 2014, 4:29pm By: loose-electron
Moved: Fastest simulation to test SNR of my ADC - Started by: aaron_do This Topic has been moved to Circuit Simulators by Ken Kundert
Regulators on PLL sub blocks	rajkumar palwai	2	2676	Apr 16^th, 2014, 2:06pm By: carlgrace
Clock divider.	Jacki	4	3783	Apr 3^rd, 2014, 12:33pm By: Jacki
comparator recommendations	aaron_do	4	4134	Mar 26^th, 2014, 8:02pm By: aaron_do
Protecting logic inputs and outputs that go to external connectors	Northy	1	2358	Mar 26^th, 2014, 11:34am By: loose-electron

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