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boa

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Another question about �noise in PFD/CP
Reply #15 - May 12^th, 2005, 11:29pm

Dear all,

I have extracted the output noise of PLL blocks using PNoise analyses as described in Ken's paper and built a linear phase-domain PLL model. The simulated results are pretty close to the measurements from the chip and the phase-domain model shows that the low-offset in-band phase noise of PLL is donimated by PFD/CP block.

The CP is a simple single-ended charge pump with switch in source. I looked at the PFD/CP output noise contributors and the major noise was due to flicker noise of NMOS cascode bias transistors in CP which is logical. But after I increased the length of the bias transistors, the next major noise contibutors were transistors in the inverters which serve as buffers for the UP & DOWN signal between PFD and CP. The buffer is a chain of 2 inverters, so Cadence shows that noise comes from the NMOS in the second inverter. If I further on increase both W&L in the second inverter, then the major noise contributors are transistors in the 1st inverter!!

I cannot explain such behavior - can this simulation results be realistic???

A few words about simulation setup: the PFD clock freq is 600 kHz, in PSS number of output harmonics is 30, in PNoise maxsideband=30, I am looking at noise at 1-10kHz.

Another question is: for PFD/CP PNoise analyses, is it necessary to use "sweeptype" parameter "absolute" or "relative" (with the 1st relative harmonic)?

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brumby

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Re: Noise in PFD/CP
Reply #16 - Nov 1^st, 2005, 2:20am

Hi Ken all,
� � �I met a problem as Amit mentioned on 03/04/05,
� � �
Quote:

Simulations converges but the problem is that i am finding noise current peaking at higher frequency (above 10Mhz). This is exactly opposite to what mentioned in your paper. I don't know where i am making mistake. ???

When run simulation to compute the jitter in PFD.
The simulation is set as following:

Quote:

pss pss fund=100M harms=20 errpreset=conservative tstab=20n
+ saveinit=yes annotate=status
pnoise pnoise start=1M stop=1G dec=20 maxsideband=30
+ oprobe=V_MODIFIED annotate=status

The driving signal to PFD/CP is 100MHz, and in PNoise analysis, I sweep frequency from 1MHz to 1GHz , and finding a current peak noise at 100MHz. And the phase offset between reference and divider signal is 0.02ns.

� �Did I set the simulation correctly?

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« Last Edit: Nov 1^st, 2005, 4:46pm by brumby »

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brumby

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Re: Noise in PFD/CP
Reply #17 - Nov 1^st, 2005, 4:41pm

When I reset the Pnoise parameter to compute the noise from 99MHz to 101MHz with setup 0.04MHz, The simulator gave the following warning:

Quote:

pnoise: freq = 99.96 MHz (48 %), step = 40 kHz (2 %)

Warning from spectre at freq = 100 MHz during PNoise analysis `pnoise'.
Infinite flicker noise is ignored.

pnoise: freq = 100 MHz (50 %), step = 40 kHz (2 %)

Is this because 1/f in zero frequency is mixed to 100MHz, and spectreRF can not operate this condition?

What I should do next?

Thanks a lot!

BTW: PNoise analysis is set like this:
Quote:

pss �pss �fund=100M �harms=20 �errpreset=conservative �tstab=20n
+ � �saveinit=yes �annotate=status
pnoise �pnoise �start=99M �stop=101M �lin=50 �maxsideband=30
+ � � � oprobe=V_MODIFIED �annotate=status

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Andrew Beckett

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Re: Noise in PFD/CP
Reply #18 - Nov 1^st, 2005, 9:00pm

Yes, this is due to the upconverted 1/f noise appearing at multiples of the PSS fundamental - which is of course what would happen in the real circuit. Spectre gives the warning because it can't calculate it exactly at the multiple of the fundamental (because it would be infinite, as the message said). You will of course see a peaking of noise either side of 100MHz, due to the upconverted 1/f noise.

Andrew.

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brumby

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Re: Noise in PFD/CP
Reply #19 - Nov 1^st, 2005, 9:23pm

Does it mean that S_n(f) is infinite at frequency �n*f_ref, .
And we should run PNoise simulation from

n*f_ref to (n+1)*f_ref respectively, and then integrated S_n(f) in these range, and then add them together to get var(n) in equation (57) in Kundert's paper ( phase noise +jitter)

Is there some easy way to get var(n), such as select Noise Type in PNoise analysis to be sources, correlation, or modulated?

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tumeda

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Re: Noise in PFD/CP
Reply #20 - Nov 10^th, 2005, 5:41am

Dear Ken, Andrew and all friends,
First of all, thanks for so detailed discussion about Pnoise on PFD/CP. But, there are still some unclear to me.
For example, the output frequency range of a PLL is 100MHz to 500MHz, the input frequency is 25MHz. Now, i would like to know the noise form CP. The Pnoise simulation is setup according to the above introduction. The input signals are the two pulses signal with an phase offset, which have the same frequency at 25MHz. The output is a grounded voltage source at the 0.5*Vdd. The simulation setup is shown as following:
Code:

 pss  pss  fund=25M  harms=50  errpreset=liberal  tstab=400n
+    saveinit=yes  annotate=status
pnoise  pnoise  start=10  stop=10G  maxsideband=50  oprobe=V3
+	 annotate=status
...."

According the formal 56, 57 in the paper "jitter and phase" of Ken, we can calculate the jitter performance of CP.
My questions are:
1. How can I deside the integration range in formal 56 ?
In my CP, if the range is from 10Hz to 25MHz, the jitter=36p, while it is from 10Hz to 10G, the jitter = 76p. So the difference is too large.
2. Form the Pnoise of the CP, I have also a current peak at about 25MHz, which has been also mentioned by others. I think it is simliar to
http://www.designers-guide.org/Forum/?board=jitter;action=display;num=1129284499...

In the Pnoise curve of my simulation, there is no a noise floor from f_c to Nosie Bandwith, which seems to confict with the figure 7 in paper. By the way, How can I know how large is Noise bandwidth for the CP? and, in Page 28 of the paper, "thus, the noise should be at least 40dB down and dropping at the highest frequency simulated." This is for phase noise(dBc/Hz) or for output noise (A**2/Hz)???
http://photo.163.com/openpic.php?user=zoujunjx&pid=500381664&_dir=%2F1744535...

Any answer would be appreciated!

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jeffyan Community Member Offline Posts: 47	Re: Noise in PFD/CP Reply #21 - Sep 20^th, 2007, 2:08am what should we set for the sweeptype,relative, or absolute? thanks
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rayni

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Re: Noise in PFD/CP
Reply #22 - Nov 7^th, 2012, 11:00am

I have a trouble while simulating the PFD/CP noise. In spectre ADE, if I change the sweep type of analysis pnoise from log to linear, the jitter changes dramatically, from 1xx ps to 2n ps. And with log sweep type, I cannot see the sideband noises spikes at multiple reference frequencies.

So, to which sweep type I am supposed to use?

Thanks

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TheScent

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Re: Noise in PFD/CP (Noise integration range)
Reply #23 - Feb 10^th, 2014, 6:50am

Dear all,

I have another question.
I simulated my PFD/CP circuit and got the noise plot, but I cannot set the integration range.
Actually, I cannot understand the sentence about integration range in "Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers." Ken said "the noise should be at least 40dB down and dropping at the highest frequency simulated." in the paper.
Can anybody tell me about the integration range of my simulated result?

I attach the picture of simulation result.

Thanks.

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pfd_cp_noise_simulation.jpg

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