I am trying to use connect modules to use both analog and digital inverters. right now my code looks like this:

module test();

     reg a;
     logic a;
     wire b,c,d;
     logic b,c,d;
     wire temp;
     logic temp;
     initial a = 0;
     initial begin
           forever a = #100  ~a;
     end
     assign temp = a;
     analog_inv a1 (temp,b);
     analog_inv a2(b,c);
endmodule

I have 2 connect modules defined elsewhere called a2d and d2a which are similiar to the ones posted on the designers guide website.

I get this error message on the line analog_inv a2(b,c):
ncelab : Segmentation of a signal between analog ports is illegal

Any ideas on what this means and how to fix it?

I am using ncverilog 04.10. So how do i get past this problem?

Thanks in advance.

LDV update got past this error, thanks.