You're right, a fractional N pll is never really locked in the sense that the output of the PFD goes to zero. It is locked in the sense that the output of the VCO is a multiple of the comparison frequency, with that multiple being a non-integer. It isn't locked in the sense that the 2 inputs to the PFD converge on 2 signal's that are phase locked. Desiging a lock detector for a fractional N loop is an interesting task, one that I'm still thinking of.