raymond_luo2003
Junior Member
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Posts: 20
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Dear all,
I am doing high speed SerDes stuff for 1394B PHY. Currently I am reading a lots of paper, and trying to draft my Serdes architecture for this PHY.
I got very much confused there is a few of papers mentioning about the Viterbi Decoder, which seems to help receiver of SerDes improving the jitter performance.
Anyone can help me to understand it a little more?
Thanks in advance! Raymond
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