The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 18th, 2024, 8:43am
Pages: 1
Send Topic Print
problem with ideal switches in Cadence (Read 1229 times)
vivkr
Community Fellow
*****
Offline



Posts: 780

problem with ideal switches in Cadence
Jul 04th, 2005, 5:58am
 
Hi,

I wonder if anyone has experienced a similar problem using the special
"sp1tswitch" provided with Spectre. This switch is useful if you want to configure
a netlist differently for different analysis and very useful.

However, if I have any such switch in my netlist (even one completely isolated from any net), Spectre refuses to perform a noise analysis citing a singular matrix as the source of error.

Any suggestions will be welcome.

Thanks
Vivek
Back to top
 
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: problem with ideal switches in Cadence
Reply #1 - Jul 5th, 2005, 3:47pm
 
It appears to be a bug. You should report it to Cadence.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
jbdavid
Community Fellow
*****
Offline



Posts: 378
Silicon Valley
Re: problem with ideal switches in Cadence
Reply #2 - Oct 2nd, 2005, 6:25pm
 
that element is OK.. but I found Verilog A to be much more flexible..
for an example,  there is a listing for a loop-opener in the  paper below which includes an (outdated) example of its use.    
"Functional Verification of a Differential Operation Amplifier"
... a fully differential current mirror opamp with n-channel input devices ... support the development of a verification script. Figure 1 Fully Differential Current Mirror Opamp with CMFB The following table ...
http://www.cadence.com/whitepapers/FVofDiffOpAmp_wp.pdf - 309.8KB

Outdated because today one would use the STABILITY analysis to look at loop gain and phase margin..

JBD
Back to top
 
 

jbdavid
Mixed Signal Design Verification
View Profile WWW   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: problem with ideal switches in Cadence
Reply #3 - Oct 2nd, 2005, 10:55pm
 
It just occurs to me that if you have a switch isolated in a circuit, then it will result in a singular matrix unless both ends of the switch must have DC paths to ground.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
jbdavid
Community Fellow
*****
Offline



Posts: 378
Silicon Valley
Re: problem with ideal switches in Cadence
Reply #4 - Oct 3rd, 2005, 11:28pm
 
sounds like bmslib sw_no would be a good alternative in that case..
jbd
Back to top
 
 

jbdavid
Mixed Signal Design Verification
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.