Hi all,
I was getting the error Registers cannot directly connect to analog ports. So used assign c=control; then it is giving  "ncelab:*E,CUVNCM : No connection module found need inoutports of continuous discipline electrical,discrete discipline logic. I am using Cadence LDV 5.1 NCSimulator.

Could anybody tell me what the problem is and how to resolve?
I really appreciate your help.
Thanks in advance.

Siva


verilog-ams CODE for switch :

`timescale 10ps / 1ps
`include "disciplines.vams"

module testbench ();
   electrical gnd;
   ground gnd;

   reg control;
     logic c;


   initial control=0;

   always #100 control=~control;

     assign c = control;

   switch sw0 (p, gnd, c);

   vsource #(.type("sine"), .ampl(1.0), .dc(5), .freq(100M)) v0 (vp, gnd);
   resistor #(.r(10k)) r0 (vp, p);
endmodule

`timescale 1ns / 1ps
`include "disciplines.vams"

module switch (p, n, s);
   parameter real ron = 10.0 from (0:inf);      // on resistance (ohms)
   parameter real roff = 100.0M from (ron:inf);// off resistance (ohms)
   parameter real td = 0.0;                  // delay time (s)
   parameter real tr = 20n;                  // rise time (on -> off) (s)
   parameter real tf = 20n;                  // fall time (off -> on) (s)
   input s;
   logic s;
   electrical p, n;
   real reff;

   analog begin
     @(posedge s) reff = ron;
     @(negedge s) reff = roff;
     @(initial_step) reff = (s ? ron : roff);
     I(p, n) <+ V(p, n) / transition(reff, td, tr, tf);
   end
endmodule