Hi All,

I am looking for different topologies integrating a differential interface with the following requirements:

- differential interface with on-chip 50 Ohm termination  
- very small power consumption
- the differential signal provides is switched current source with 5mA. both input lines are externally terminated with 50 Ohms to 3.3V.
- the input frequency is 400 MHz

What kind of topology would be the best as the complete system is very jitter sensitive ?  

Thanx for the hopefully incomming answers,

Linus

..or 50 Ohms termination for each input..

Yes, I am talking of I/O interfaces, and I did look at LVDS interfaces.. But: think for the type of interface I am looking for, this could be an averkill, or ?

My basic idea was: having an nmos source follower with an nmos current source for each input. The gate of the source follower is the input and has an on-chip 50 Ohms resistor to VDD. The outputs of the source follower is connected to a simple differential to single ended comparator.

..but I am looking for alternatives..

Linus