The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Mar 28th, 2024, 12:27pm
Pages: 1 2 
Send Topic Print
question in sigma-delta ADC (Read 4049 times)
chuzi
Junior Member
**
Offline



Posts: 12
BeiJing China
Re: question in sigma-delta ADC
Reply #15 - Jan 03rd, 2006, 7:15pm
 
Dear Sheldon,
   Great thanks to you for your help, I will read it and think about what you said careful. But maybe I didn't get the exact meaning of your last two sentences,always need to run that final simulation and just want to run minimize the number of times you run that two week long simulation. Could you forgive my ignorance and explain the sentences for me again? Thanks again.
   And there is another little question:) My fft result is below:

   The peak signal is above 0dB, my m-file is in earlier post, could you please to tell me how to modify it? Great thanks.
   Best regards!
  chuzi

sheldon wrote on Dec 30th, 2005, 6:54pm:
Chuzi,

  There is a good description of the factors you might
want to explore, at this link

http://www.imse.cnm.es/esd-msd/WORKSHOPS/MIXMODEST/PRESENTATIONS/medeiro1.pdf

Medeiro has done a good job of breaking down the
factors that effect performance.

  Next, you might want to spend some more time
thinking about your overall methodology/strategy
for performing this design, in particular, look at the
stuff that Ken has written about top-down design. My
experience is that using just system level, Simulink,
and transistor level simulation is not going to get
you the result you want in the time you want.
You really need to think about using mixed-level
simulation. You will always need to run that final
simulation. You just want to run minimize the number
of times you run that two week long simulation.

                                              Best Regards,

                                                Sheldon


Back to top
 

64OSRfft_001.jpg
View Profile   IP Logged
chuzi
Junior Member
**
Offline



Posts: 12
BeiJing China
Re: question in sigma-delta ADC
Reply #16 - Jan 3rd, 2006, 7:24pm
 
Hi ZhengHao,
   I delivered the mail again and I am in BeiJing:) That book is expensive for me, and I suggest that you recommand it to the library nearby and borrow it. That is all about 2-1 cascade 1-bit sigma-delta modulator, you could just follow it. Actually my 2-1-1 followed it,too:)
   Best regards!
chuzi
c.h.zheng wrote on Jan 1st, 2006, 8:14am:
hi chuzi:
thanks for your advice,my email add:wwwzhenghao@163.com.could you try again,where are you?i'm  from chengdu,in china.could you tell me where that book can buy?thanks very much.

Back to top
 
 
View Profile   IP Logged
material
New Member
*
Offline



Posts: 2

Re: question in sigma-delta ADC
Reply #17 - Jun 4th, 2006, 7:34am
 
It seems that you forget to divide something.

You can read the paper "Behavioral Modeling of Switched-Capacitor Sigma–Delta Modulators" CAS,March,03
And the source code which can be found in the mathwork website named SDT for reference.
Back to top
 
 
View Profile   IP Logged
jovial
Junior Member
**
Offline



Posts: 19

Re: question in sigma-delta ADC
Reply #18 - Mar 7th, 2016, 10:24pm
 

Hi Sheldon,
Can you plz forward me the document  since the link does not work .

http://www.imse.cnm.es/esd-msd/WORKS...S/medeiro1.pdf
Back to top
 
 
View Profile   IP Logged
Pages: 1 2 
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.