Hello,

Following lines of VHDL-AMS code (part of the description of a filter) generate erroneous output waveforms:

vinp_filt == vinp_noisy-0.5*(vinp+vinn);
vinn_filt == vinn_noisy-0.5*(vinp+vinn);

voutp_filt == vinp_filt'ltf(num,den);
voutn_filt == vinn_filt'ltf(num,den);

with vinp_noisy, vinn_noisy being the across quantities associated with the output terminals of a SPICE SUBCKT which includes a noisy voltage source like this:

.SUBCKT noise_gen vin vout
Vnoise vin vout noise 1.6e-17 0 1                  <- ELDO noise source
.ENDS noise_gen

Without the addition of this noise, the code of the filter provided good results (good filtering operation observed).
In combination with the noise generating SUBCKT, a transient noise analysis produces an erroneous filter ouput (DC signal instead of filtered signal + noise).

If I bypass the filtering, so

voutp_filt == vinp_filt;
voutn_filt == vinn_filt;

I do get a nice, noisy+filtered output waveform.


It has to be noted, that when I use the 'ltf statement and the noise generating SUBCKT, the results provided by an AC simulation look OK (inoise/onoise as expected).

Is anybody familiar with this issue and/or knows a workaround?

Kind Regards,

Peter