Note that the phase margin will be sensitive to the termination at the input i.e; whether you're driving with a voltage source (low impedance) or a current source (high impedance). You can easily figure out that the current source case is the one that will cause you pain.
Power supply bypass is another point often overlooked by TIA designers. Make sure you model your off-chip caps correctly. Another recommendation is to use a small amount of local feedback on the 'open loop' amplifier - like current series.
Whatever method you use, ensure you run your sims with layout pex (parasitic extraction). TIA's are particularly sensitive to the feedback capacitance Cf.
M.G.Rajan
www.eecalc.com