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Gate Drain capacitance (Read 6031 times)
aaron_do
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Gate Drain capacitance
Mar 1st, 2007, 11:02pm
 
Hi all,

I understand that Cgd is split into three terms. One is Cf and is the fringing capacitance, one is Cgd,p and is the parasitic capacitance due to gate drain overlap, and the third is the Cgd intrinsic to the device. Have I got that right? Is the third component the capacitance between the gate and the channel?

Ok that aside, i'm wondering in the saturation region, we can calculate Cgd, Cgs, and Cgb. But in the subthreshold region, we can only calculate Cgb. This transition seems to be almost immediate on the threshold. If i'm dealing with a circuit operating around the threshold, should I assume Cgd = 0 (the third component only)?

thanks,
Aaron

oops...wrong category...
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« Last Edit: Mar 02nd, 2007, 3:16am by aaron_do »  

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Croaker
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Re: Gate Drain capacitance
Reply #1 - Mar 2nd, 2007, 11:39am
 
In subthreshold, the Cgd overlap still matters.

By the way, saturation and subthreshold are not mutually exclusive.
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aaron_do
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Re: Gate Drain capacitance
Reply #2 - Mar 2nd, 2007, 5:23pm
 
Hi Croaker,

thanks for the reply. I confused all my terms... I meant to say Cgd,p (parasitic) is Cov (overlap) + Cf (fringing) and its always there. Cgd is the intrinsic capacitance and it disappears in subthreshold.

"By the way, saturation and subthreshold are not mutually exclusive."  that's where i'm gonna have problems ... i'm trying to estimate Cgd (total) around the weak inversion region using the BSIM3.3v2 model. Any help would be appreciated

thanks,
Aaron
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mg777
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Re: Gate Drain capacitance
Reply #3 - Mar 4th, 2007, 10:06am
 

Quote: "By the way, saturation and subthreshold are not mutually exclusive."

Here's what I understand of Croaker's statement, please correct me if I got it wrong: subthreshold is a matter of surface potential i.e; shifting the surface Fermi level via VGS and the depletion charge via VSB (body effect).

OTOH saturation has to do with pinching the channel at the drain end and only requires VDS > VGS - VT. BTW, does this condition for saturation depend on the substrate potential?

M.G.Rajan
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aaron_do
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Re: Gate Drain capacitance
Reply #4 - Mar 4th, 2007, 8:42pm
 
Ok thanks, i finally got that point.

i'm also interested in the answer...... "does this condition for saturation depend on the substrate potential?"

So from what i understand, when the channel is pinched off, Cgd becomes independent of both Vgs and L (approximately). When we say independent of L, does that include different technologies? For instance, if the preceision of a technology improves, is it not likely that the length of the gate drain overlap would decrease and thereby reduce Cov? If yes, is there a way we can quantify that?

thanks,
Aaron
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vivkr
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Re: Gate Drain capacitance
Reply #5 - Mar 5th, 2007, 3:09am
 
aaron_do wrote on Mar 4th, 2007, 8:42pm:
Ok thanks, i finally got that point.

i'm also interested in the answer...... "does this condition for saturation depend on the substrate potential?"



Dear Aaron,

I would say that the condition for saturation in inversion is independent of the substrate potential atleast
to a first approximation. Essentially, the MOS transistor behaves like a BJT in weak inversion but with
gm = Ic/n.Vt, where n is the subthreshold slope and Vt = kT/q.

The drain-source voltage should be > 4-5 Vt typically (remember VCE > 0.2V for BJT linear region operation?).

More info may be found in Tsividis or other good texts on MOS operation.

Regards
Vivek
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