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Phase margin of PLL from SpectreRF? (Read 2509 times)

savithru Junior Member Offline Posts: 11	Phase margin of PLL from SpectreRF? Jul 20^th, 2007, 12:55am Hi, I want to know how I can check the Phase margin of my PLL. I am using the specterRF. Also is it possible to check/plot the loop gain. Kindly reply. Thanks & Regards SavithRu
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Visjnoe Senior Member Offline Posts: 233	Re: Phase margin of PLL from SpectreRF? Reply #1 - Jul 20^th, 2007, 2:39am Dear, I suggest you construct a phase domain model using MATLAB and fill in the device level parameters. You can also use verilog-A for this of course (I refer to the papers by Ken Kundert which discuss such a model). Regards Peter
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Ken Kundert Global Moderator Offline Posts: 2386 Silicon Valley	Re: Phase margin of PLL from SpectreRF? Reply #2 - Jul 20^th, 2007, 12:54pm If the PLL can be directly analyzed in SpectreRF (i.e. if the steady-state solution is purely periodic), then you could also use pstb analysis to check the stability on the actual PLL (rather than building a model). -Ken
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