Hi,
We need accurate on-chip oscillator for "charge measurement". The frequency of oscillator is ~2MHz. But the frequency variation over PVT should be limited to +/- 1%.  
Is it possible to realize such an on-chip oscillator?  ::) Any material / reference / previous work in thesis form would be really appreciated.
Note: Use of Crystal is not allowed due to pin-count reason.
Process: 0.35um; Supply Current: 50 uA. Trimming is allowed [Obviously the no. of trim bits is limited.]

Thanks,
Packiaraj.V.

Thanks for your suggestions, Peter.
Does the +Ve/-Ve Temp  coefficients of "R" cancel perfectly that we don't need Trimming [To counter-act R variation over Temperature] to achieve +/1% accuracy? [Though How Trimming for Temperature variations is done is a question  :( ]. This +/-1% accuracy should be met over 6-sigma [Process and  Mismatch variation]. [The Stigma of Six-Sigma  :P]

Please see the Doc. attached for Figure taken from "A Temperature Compensated Fully Trimmable On-Chip IC Oscillator" by A. Olmos. The idea is similar.  
i.e., Combine IPTAT+ICTAT=IREF and use Trimming to control IREF Vs Temp variations. And use only C [No Trmming for C , As It would call for huge area.]. Let the Temp Trimmed Current be IREF_T.
However the on-chip variation of C is counter-acted by changing the current "IREF_T" using another magnitude trimming. Let this current be IREF_TM  

dV/dt=IREF_TM/C
1/dt=IREF_TM/[C*dV]=2*Frequency

Here dV is the Trimmed BandGap Voltage used for comparing the voltage across a Capacitor. This Capacitor is charged and discharged using IREF_TM during the alternate phases.
But, as you could see, this involves 2 levels of Trimming. I am curious to know If there would be a better method to realize Low-Frequency, Highly accurate OSC? [Better architecture with not-so-much of Trimming]

Thanks,
Packiaraj.V.

Packiaraj.V,

I would use the 2 stage trimming that you suggest because your spec is so extreme. Just beware that with such a high level of accuracy you are subject to other errors such as:

package shift
measurment error

To avoid package shift, you should use a post-package trim method.
MonteCarlo

No references I'm sorry.

What I mean by post-package is that you can program the trim after packaging. Some trim technologies are more suited to programing at wafer level.

-Monte