Dear,

I have to design an LDO to supply a 10mA(average) digital load clocked at 2MHz. It has to without an external cpacitor and maximum quiscent current allowed is 10mA.

First of all, I would like to know if this is feasible in 0.35u CMOS. If feasible, any ideas about how to proceeed?

This seems to possible with a simple miller compensated loop, but achieving a good PSRR is difficult. Therefore, I would like to know if there are any other techniques to do this

Regards
Rajesh