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hbs

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How to make sure the transistors in saturation reg
Sep 27^th, 2007, 3:59pm

Hi, all.

I use ADS to simulate the AC response of this gain-boosting amplifier as the following figure (please see the attachment), but it is verypainful to choose the comfortable voltage Vref and Vin if I use the simple DC-source or DC parameter in AC-source in order to make sure M1 and M2 in saturation region. Because of the current-source Id, the Vd and Vout is very large when I set the Vin and Vref from 0.5-0.7V. Maybe
there is effective ways to find the right Vin and Vref such as connecting one large resistance between the Vref and the Vout node?

Looking for the help from everybody.
Thank you very much indeed..

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RobG

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Bozeman, MT

Re: How to make sure the transistors in saturation
Reply #1 - Sep 28^th, 2007, 10:30am

I love these problems ;)

To set the dc bias connect a large resistor (or inductor) between Vin and Vout and AC couple in Vin.

You will still have to set Vref manually, but that should be easy... it just has to be larger than Vdsat of M1 (but not so large as to make M2 linear). A DC sourse in series with the resistor will give you more headrooom if needed.

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allanxu

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Re: How to make sure the transistors in saturation
Reply #2 - Oct 15^th, 2007, 7:49pm

I am a newcomer here, maybe not sure about your question but I want to try to discuss about this circuit.

I once design a very similar circuit to achieve OTA with better linearity. I think if you design your GBamp with PMOS input in stead of NMOS input will help you to choose Vref and Vin.
Because when you choose Vd of M1 you may want M1 is just at the edge of saturation, but if you use NMOS input stage instead of PMOS input stage Vd will have to be greater than Vgs which reduce the input swing of GBamp.

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vivkr

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Re: How to make sure the transistors in saturation
Reply #3 - Oct 16^th, 2007, 1:32am

Hi allanxu,

I agree fully with your suggestion. I too use PMOS input transistors for the gain boosting amps in such a situation.
The biasing becomes much easier in that case.

Also, Vref can be easily generated using a replica structure if you want to track the process. I do the following:

1. First forget the gain boosting amp altogether, and design a bias structure to set the cascode in the correct operating
range. You can use low-voltage cascode biasing schemes. This includes 2 branches (see Johns & Martin or Razavi for examples).
One of the branches is a diode-connected cascode pair and the other is a diode-connected transistor sized to keep the first
cascode stack in saturation.

2. Now, tap Vref from the source of the cascode transistor in the above stack.

Regards
Vivek

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