wyyll
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Posts: 4
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Hi Aaron,
If you look at the control voltage waveform after you add the capacitance to the LC tank, it suggests that the PLL is locking, in response to a change in the trajectory of the tank. Consider that the period and amplitude of the ringing changes with each successive cycle.
To see in your simulation if the loop has settled, plot out the voltage on the big damping capacitor. C11, in your posted schematic. Has this voltage finished settling?
Having said this, I would again encourage you to get a phase domain model of some sort up and running, as other before me have said.
I hope this helps.
Will
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