mobil wrote on Feb 13th, 2008, 8:00pm:Hi all,
Recently I met an interesting question for high-frequency PLL design. In the design, a CML frequency divider is connected to the VCO, which is running at millimeter-wave frequencies. We wanted a buffer to connect VCO and the divider. But at this high frequency, it's not easy to design a buffer such as source-follower or differential amplifier as the analog design. We then decide to use the RF power amplifier (PA) design method, but here is the problem:
The PA design is concerned about matching network(usually 50 Ohm) both input and output. But imaging the VCO's load is a 50 Ohm matching network, this will totally disable the VCO at that high frequencies. Meanwhile, a large voltage swing is needed to drive the divider, which means the input impedance of the divider should be as large as possible (>> 50 Ohm).
Above all, what we need is a RF OP-amp which has large input impedance, small output impedance and can amplify the VCO's voltage swing. I checked lots of references but can't find the topic about the RF voltage amplifier design.
Doesn't anyone have an idea or any comments? Thanks
Hi:
If you want to a buffer between VCO and CML frequency divider ,why not just use the cml buffer? The cml buffer/amp with/without inductor peaking works well in millimeter-wave frequencies,if the signal path is much less than the wave length.
PA is used to delivery a requirement power to a certain impedance load,so some impedance transfer need to be done for giving a big power to the load with on-chip low vdd limited. that is ,I think, you needn't a PA here.
For very high freqency vco, the CML frequency divider will not work well(I suppose a CML DFF is used).You can try to use Injection Locking divider,which can work almost as fast as your vco.