Monkeybad
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Posts: 31
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Hi, raduga! Besides the high speed consideration, linearity is another reason for using low output resistances. The output impedance and the parasitic impedance of an non ideal current source will affect the linearity. Define Rratio=Ro/Rload, where Ro is the parasitic impedance of an non ideal current source looking from the Drain and Rload is the output loading resistance. The higher the Rratio is, the better the linearity of a DAC is. You can refer to "Cmos Data Converters For Communications, Gustuavsson, Wikner and Tan" In Chapter 12 there are some discussions about the output resistances effect. Hope this will provide some help.
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