Hi all,

I was just wondering what the drawbacks are in using a bipolar differential pair for a fully differential opamp that is going to be used in a switched cap application (BICMOS process).

I know is not the typical approach but the reason I'm think of using bipolar rather than MOS input is to minimize offset and 1/f noise contribution from this opamp to the overall system performance Other approaches for minimizin this contritbution like chopping or auto-zeroing are not an option since I do not have room for any post-filtering.

As a first drawback I just thought of the droop the base current unbalance might generate on the capacitors assuming the amplifier will have some small input referred offset.

Any ideas or comments are welcome.

Thanks in advance
Tosei

Hi Adam,

Thanks for your comments. You brought a good point on the capacitor mismatch, which certainly will have some impact apart from the base currents as I pointed out.
The idea is to use small capacitor values with a stray insensitive switch arrangement for the caps, so that is something that will end up hurting me.

Any of the dynamic offset cancellation techniques would be very effective in removing the offset components from the mos input pair. However, I would have to kill somehow the high frequency noise or ripple - if I use chopping - or deal with an excessive base band noise if I use auto-zero (due to noise folding).
That is why I considered the option of going with bipolar input which, at a first degree would not need any technique for reducing the offset or noise components (compared to the MOS input).

I agree at the end of the day the other effects might worsen the overall picture as you suggested.

Thanks
Tosei

Adam,

thanks again for your feedback. Matching of beta and VBE in bipolars is driven essentially by the same parameter: base charge --> A mismatch on the betas will create (for perfectly equal collector currents) a mismatch on VBE. Also, a difference on the saturation current density will create a VBE mismatch. Such saturation current mismatch will generate a mismatch on the collector currents and ultimately on the base currents --> similar to a beta mismatch.

That was my first thought about using bipolars for the SC amp --> having beta mismatch will generate a different droop on both input branches that will hurt me (even assuming ideal matching for the caps).

As for the noise fold-backing, I forgot to mention something important: the incoming signal going into the SC amp is already filtered (AAF) such that the SC amp does not fold back any noise component coming with the input signal. Therefore, not auto-zeroing the amplifier will essentially not generate any extra baseband noise, while auto-zeroing it will fold back all the noise components generated inside the amplifier.

Thanks
Tosei

Hi Solidstate,

Many thanks for the info.

Regards
Tosei

Hi raja.cedt

I think you are referring to using BJT as switched in the SC amp.
Instead I was referring to using BJT in the input pair of the amplifier. Certainly the switches are much easire to realise with MOS transistors although bipolar switches have been used in the past. However I was not asking here about using BJT switches as I explained above.

Thanks anyway
Tosei

Hi raja.cedt,

Yes, this is a BICMOS process and certainly I'm thinking of using a MOS active load for the first stage and 2nd stage also in order to minimize noise and offset contributions from the internal opamp stages.

Regards
Tosei