The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Sep 29th, 2024, 2:19am
Pages: 1
Send Topic Print
track and hold circuit parameter (Read 4048 times)
nuoan
New Member
*
Offline



Posts: 6

track and hold circuit parameter
Oct 16th, 2008, 5:27pm
 
Hi,

A simple track and hold circuit could be found in the literature. The schematic is shown below

I would like to do some simulation for this circuit on Cadence. My input data are:
1. Vin+ = 1.2V, Vclk =20GHz,
2. the frequecy of Vin+ is Fin=5GHz

My problems are:
1) how to determine the Vclkb?
2) how to obtain a common-mode input voltage?
3) if I want to increase the input bandwidth, what can I do?
4) Do anyone have a detailed parameter for this circuit?

I want to get some inputs for how to solve these problems.

Thanks in advance
nuoan
Back to top
 

Track_and_Hold.jpg
View Profile   IP Logged
raja.cedt
Senior Fellow
******
Offline



Posts: 1516
Germany
Re: track and hold circuit parameter
Reply #1 - Oct 17th, 2008, 4:47am
 
for what purpose u r using this  S/H circuit?Becaz S/H circuits selection based on application.I  am getting why you shorted mosfets whose gate is connected to clkb.Better use some gate boosted kind of circuit.use the following reference.its linearity is excellent.

  A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter A. Abo and P. Gray, IEEE Journal of Solid-State Circuits, May 1999
Back to top
 
 
View Profile WWW raja.sekhar86   IP Logged
nuoan
New Member
*
Offline



Posts: 6

Re: track and hold circuit parameter
Reply #2 - Oct 20th, 2008, 3:54pm
 
raja.cedt wrote on Oct 17th, 2008, 4:47am:
for what purpose u r using this  S/H circuit?Becaz S/H circuits selection based on application.I  am getting why you shorted mosfets whose gate is connected to clkb.Better use some gate boosted kind of circuit.use the following reference.its linearity is excellent.

  A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter A. Abo and P. Gray, IEEE Journal of Solid-State Circuits, May 1999

Thanks!  raja

This Track and Hold circuit is used for the front end of high speed flash ADC, say 5Ghz.
By  using 5GHZ as sampling frequecy, when the input frequency is 2.5GHz, the simulation shows that the output signal is distorted very seriously.

I want to improve the bandwidth. Can someone give some suggestion and direction?

To increase the input bandwidth, which parameter can I change?
or can I add some circuit? Is there some good reference available?
Back to top
 
 
View Profile   IP Logged
raja.cedt
Senior Fellow
******
Offline



Posts: 1516
Germany
Re: track and hold circuit parameter
Reply #3 - Oct 21st, 2008, 1:41am
 
hi,
   for flash use simple switch followed by common drain amp(buffer).its more than enough for getting higher bandwidth(i think this ckt will give pretty nice BW than others.).but here you will have to loose one VGs droop across the buff  so as to compensate for that use another buffer with opposite polarity.
use the following reference.
V. Srinivas, S. Pavan, A. Lachhwani and N. Sasidhar," A Distortion Compensating Flash Analog to Digital Conversion Technique,"  IEEE Journal of Solid State Circuits.  September 2006
Back to top
 
 
View Profile WWW raja.sekhar86   IP Logged
nuoan
New Member
*
Offline



Posts: 6

Re: track and hold circuit parameter
Reply #4 - Oct 22nd, 2008, 3:27pm
 
raja.cedt wrote on Oct 21st, 2008, 1:41am:
hi,
   for flash use simple switch followed by common drain amp(buffer).its more than enough for getting higher bandwidth(i think this ckt will give pretty nice BW than others.).but here you will have to loose one VGs droop across the buff  so as to compensate for that use another buffer with opposite polarity.
use the following reference.
V. Srinivas, S. Pavan, A. Lachhwani and N. Sasidhar," A Distortion Compensating Flash Analog to Digital Conversion Technique,"  IEEE Journal of Solid State Circuits.  September 2006

thanks, is there any technique to obtain wideband?
Back to top
 
 
View Profile   IP Logged
raja.cedt
Senior Fellow
******
Offline



Posts: 1516
Germany
Re: track and hold circuit parameter
Reply #5 - Oct 22nd, 2008, 9:43pm
 
why you want wide band? don't think if u can find some fast S/H ckt that will help.Because inside the flash  comparator array is very difficult to make that much fast.Generally S/H is double bandwidth when compared to Falsh core (if you want one sampling ahead the comparison).
Any how if you are eager to get wide band S/H use  super sourse follower circuit (this circuit you can get in razaavi current mirrors chapter)in S/H.

Can you plese tell me the toplevel specs means
1.No of bits
2.Targeting ENOB
3.how much sampling rate
4.application (audio/video/sensor)
5.FOM
so that i can tell you clearly
Back to top
 
 
View Profile WWW raja.sekhar86   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.